diff mbox series

drm/bridge: parade-ps8640: Reorg the macros

Message ID 20210820162201.1.I8ead7431357409f2526e5739ec5bc3ddfd242243@changeid (mailing list archive)
State New, archived
Headers show
Series drm/bridge: parade-ps8640: Reorg the macros | expand

Commit Message

Philip Chen Aug. 20, 2021, 11:22 p.m. UTC
From: Philip Chen <philipchen@chromium.org>

Reorg the macros as follows:
(1) Group the registers on the same page together.
(2) Group the register and its bit operation together while indenting
the macros of the bit operation with one space.

Also fix a misnomer for the number of mipi data lanes.

Signed-off-by: Philip Chen <philipchen@chromium.org>
Signed-off-by: Philip Chen <philipchen@google.com>
---

 drivers/gpu/drm/bridge/parade-ps8640.c | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

Comments

Doug Anderson Aug. 24, 2021, 10:37 p.m. UTC | #1
Hi,

On Fri, Aug 20, 2021 at 4:22 PM Philip Chen <philipchen@chromium.org> wrote:
>
> From: Philip Chen <philipchen@chromium.org>
>
> Reorg the macros as follows:
> (1) Group the registers on the same page together.
> (2) Group the register and its bit operation together while indenting
> the macros of the bit operation with one space.
>
> Also fix a misnomer for the number of mipi data lanes.
>
> Signed-off-by: Philip Chen <philipchen@chromium.org>
> Signed-off-by: Philip Chen <philipchen@google.com>
> ---
>
>  drivers/gpu/drm/bridge/parade-ps8640.c | 18 ++++++++++--------
>  1 file changed, 10 insertions(+), 8 deletions(-)

This seems fine to me other than the slightly mixed up Signed-off-by
lines. I think that the git config from wherever you ran "git
send-email" had your @google.com address even if you authored the
patch with your @chomium.org address. Once that's fixed then I'm happy
to add my Reviewed-by and (unless someone objects) I'll plan to apply
this patch to drm-misc-next.

-Doug
Philip Chen Aug. 25, 2021, 1:14 a.m. UTC | #2
Hi,

On Tue, Aug 24, 2021 at 3:37 PM Doug Anderson <dianders@chromium.org> wrote:
>
> Hi,
>
> On Fri, Aug 20, 2021 at 4:22 PM Philip Chen <philipchen@chromium.org> wrote:
> >
> > From: Philip Chen <philipchen@chromium.org>
> >
> > Reorg the macros as follows:
> > (1) Group the registers on the same page together.
> > (2) Group the register and its bit operation together while indenting
> > the macros of the bit operation with one space.
> >
> > Also fix a misnomer for the number of mipi data lanes.
> >
> > Signed-off-by: Philip Chen <philipchen@chromium.org>
> > Signed-off-by: Philip Chen <philipchen@google.com>
> > ---
> >
> >  drivers/gpu/drm/bridge/parade-ps8640.c | 18 ++++++++++--------
> >  1 file changed, 10 insertions(+), 8 deletions(-)
>
> This seems fine to me other than the slightly mixed up Signed-off-by
> lines. I think that the git config from wherever you ran "git
> send-email" had your @google.com address even if you authored the
> patch with your @chomium.org address. Once that's fixed then I'm happy
> to add my Reviewed-by and (unless someone objects) I'll plan to apply
> this patch to drm-misc-next.

Thank you.
I just posted v2 with the double sign-off lines fixed.
PTAL.

>
> -Doug
diff mbox series

Patch

diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c b/drivers/gpu/drm/bridge/parade-ps8640.c
index 7bd0affa057a..685e9c38b2db 100644
--- a/drivers/gpu/drm/bridge/parade-ps8640.c
+++ b/drivers/gpu/drm/bridge/parade-ps8640.c
@@ -18,16 +18,18 @@ 
 #include <drm/drm_print.h>
 
 #define PAGE2_GPIO_H		0xa7
-#define PS_GPIO9		BIT(1)
+#define  PS_GPIO9		BIT(1)
 #define PAGE2_I2C_BYPASS	0xea
-#define I2C_BYPASS_EN		0xd0
+#define  I2C_BYPASS_EN		0xd0
 #define PAGE2_MCS_EN		0xf3
-#define MCS_EN			BIT(0)
+#define  MCS_EN			BIT(0)
+
 #define PAGE3_SET_ADD		0xfe
-#define VDO_CTL_ADD		0x13
-#define VDO_DIS			0x18
-#define VDO_EN			0x1c
-#define DP_NUM_LANES		4
+#define  VDO_CTL_ADD		0x13
+#define  VDO_DIS		0x18
+#define  VDO_EN			0x1c
+
+#define NUM_MIPI_LANES		4
 
 /*
  * PS8640 uses multiple addresses:
@@ -254,7 +256,7 @@  static int ps8640_bridge_attach(struct drm_bridge *bridge,
 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
 			  MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
 	dsi->format = MIPI_DSI_FMT_RGB888;
-	dsi->lanes = DP_NUM_LANES;
+	dsi->lanes = NUM_MIPI_LANES;
 	ret = mipi_dsi_attach(dsi);
 	if (ret)
 		goto err_dsi_attach;