From patchwork Wed Sep 15 22:31:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 12497605 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MIME_BASE64_TEXT,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04431C433EF for ; Wed, 15 Sep 2021 22:36:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BC6F16023D for ; Wed, 15 Sep 2021 22:36:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org BC6F16023D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3954289F33; Wed, 15 Sep 2021 22:36:43 +0000 (UTC) Received: from mailgw02.mediatek.com (unknown [1.203.163.81]) by gabe.freedesktop.org (Postfix) with ESMTP id 5AEA589F69 for ; Wed, 15 Sep 2021 22:36:41 +0000 (UTC) X-UUID: b44dc5c443b9423796d0a00d17b6e1f6-20210916 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=rjEz5Kn3VIz46kt9NukJ6kGABo04SufkfAzoukdeg8Q=; b=RhbvMA+AJcEEF4Aej3pVcq52b4Yd2eL96+utJk2fnPcmhaDfcjVzr7Y0L1yLIbdZNV3L0Uz3fnqxMggTrfP2+cH2nqeBfS4UyWZB3OzRcvdRfvB3Xy6zuphv+aFgZdibWJoxv9ON3kAwhdQgE+R0UuTViDy5+ZuIb7aH+Q0djHM=; X-UUID: b44dc5c443b9423796d0a00d17b6e1f6-20210916 Received: from mtkcas36.mediatek.inc [(172.27.5.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 340433354; Thu, 16 Sep 2021 06:31:35 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 16 Sep 2021 06:31:26 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (10.16.6.18) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 16 Sep 2021 06:31:25 +0800 From: Jitao Shi To: Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , Daniel Vetter , David Airlie , , CC: , , , , , , , Jitao Shi Subject: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned Date: Thu, 16 Sep 2021 06:31:15 +0800 Message-ID: <20210915223117.7857-2-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210915223117.7857-1-jitao.shi@mediatek.com> References: <20210915223117.7857-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 1BE109D5F6ED7D38BAD44844D97596ED11FAC3A3FB224F4D54CF33DC5EFFFBF52000:8 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Some DSI devices reqire the hs packet starting and ending at same time on all dsi lanes. So use a flag to those devices. Signed-off-by: Jitao Shi Reviewed-by: Chun-Kuang Hu --- include/drm/drm_mipi_dsi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index af7ba8071eb0..8e8563792682 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { * @lp_rate: maximum lane frequency for low power mode in hertz, this should * be set to the real limits of the hardware, zero is only accepted for * legacy drivers + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned */ struct mipi_dsi_device { struct mipi_dsi_host *host; @@ -189,6 +190,7 @@ struct mipi_dsi_device { unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; + bool hs_packet_end_aligned; }; #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:"