@@ -522,6 +522,14 @@ static void slpc_get_rp_values(struct intel_guc_slpc *slpc)
GT_FREQUENCY_MULTIPLIER;
slpc->min_freq = REG_FIELD_GET(RPN_CAP_MASK, rp_state_cap) *
GT_FREQUENCY_MULTIPLIER;
+
+ slpc->boost_freq = slpc->rp0_freq;
+}
+
+static void slpc_reset_waiters(struct intel_guc_slpc *slpc)
+{
+ /* min, max and boost frequencies have all been reset */
+ slpc->num_waiters = 0;
}
/*
@@ -585,6 +593,8 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc)
return ret;
}
+ slpc_reset_waiters(slpc);
+
return 0;
}
@@ -20,10 +20,13 @@ struct intel_guc_slpc {
u32 min_freq;
u32 rp0_freq;
u32 rp1_freq;
+ u32 boost_freq;
/* frequency softlimits */
u32 min_freq_softlimit;
u32 max_freq_softlimit;
+
+ u32 num_waiters;
};
#endif
Boost frequency is initialized at RP0. Also define num_waiters which can track the pending boost requests. This is set to 0 when we enable SLPC. Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 10 ++++++++++ drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 3 +++ 2 files changed, 13 insertions(+)