From patchwork Fri Oct 29 08:31:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Auld X-Patchwork-Id: 12592167 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4810EC433F5 for ; Fri, 29 Oct 2021 08:33:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A05761151 for ; Fri, 29 Oct 2021 08:33:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1A05761151 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B9366EA2F; Fri, 29 Oct 2021 08:32:40 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7021B6EA1E; Fri, 29 Oct 2021 08:32:33 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10151"; a="210671286" X-IronPort-AV: E=Sophos;i="5.87,192,1631602800"; d="scan'208";a="210671286" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2021 01:32:33 -0700 X-IronPort-AV: E=Sophos;i="5.87,192,1631602800"; d="scan'208";a="448302254" Received: from hohiggin-mobl2.ger.corp.intel.com (HELO mwauld-desk1.intel.com) ([10.213.197.138]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2021 01:32:31 -0700 From: Matthew Auld To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, Maarten Lankhorst , Niranjana Vishwanathapura Subject: [PATCH v2 06/10] drm/i915/pm: Move CONTEXT_VALID_BIT check Date: Fri, 29 Oct 2021 09:31:14 +0100 Message-Id: <20211029083118.3386312-6-matthew.auld@intel.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20211029083118.3386312-1-matthew.auld@intel.com> References: <20211029083118.3386312-1-matthew.auld@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Maarten Lankhorst Resetting will clear the CONTEXT_VALID_BIT, so wait until after that to test. Signed-off-by: Maarten Lankhorst Reviewed-by: Niranjana Vishwanathapura Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c index a1334b48dde7..849fbb229bd3 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c @@ -52,8 +52,6 @@ static int __engine_unpark(struct intel_wakeref *wf) /* Discard stale context state from across idling */ ce = engine->kernel_context; if (ce) { - GEM_BUG_ON(test_bit(CONTEXT_VALID_BIT, &ce->flags)); - /* Flush all pending HW writes before we touch the context */ while (unlikely(intel_context_inflight(ce))) intel_engine_flush_submission(engine); @@ -68,6 +66,9 @@ static int __engine_unpark(struct intel_wakeref *wf) ce->timeline->seqno, READ_ONCE(*ce->timeline->hwsp_seqno), ce->ring->emit); + + GEM_BUG_ON(test_bit(CONTEXT_VALID_BIT, &ce->flags)); + GEM_BUG_ON(ce->timeline->seqno != READ_ONCE(*ce->timeline->hwsp_seqno)); }