From patchwork Tue Nov 30 17:26:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 12647867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFDDAC4332F for ; Tue, 30 Nov 2021 17:26:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 33B636E42F; Tue, 30 Nov 2021 17:26:26 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7B4AF6E42F for ; Tue, 30 Nov 2021 17:26:24 +0000 (UTC) X-UUID: fd5d7e9ebd0e48b3b49b4f9e95d3ab09-20211201 X-UUID: fd5d7e9ebd0e48b3b49b4f9e95d3ab09-20211201 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1811187298; Wed, 01 Dec 2021 01:26:19 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Wed, 1 Dec 2021 01:26:18 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 1 Dec 2021 01:26:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 1 Dec 2021 01:26:17 +0800 From: jason-jh.lin To: Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , Subject: [PATCH v2 1/2] drm/mediatek: add blocking config mode for crtc disable flow Date: Wed, 1 Dec 2021 01:26:15 +0800 Message-ID: <20211130172616.9127-2-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211130172616.9127-1-jason-jh.lin@mediatek.com> References: <20211130172616.9127-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fshao@chromium.org, David Airlie , "jason-jh.lin" , singo.chang@mediatek.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, nancy.lin@mediatek.com, linux-mediatek@lists.infradead.org, hsinyi@chromium.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" mtk_drm_crtc_atomic_disable will send an async cmd to cmdq driver, so it may not finish when cmdq_suspend is called sometimes. Change async cmd to blocking cmd for mtk_drm_crtc_atomic_disable to make sure the lastest cmd is done before cmdq_suspend. Signed-off-by: jason-jh.lin --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index 62529a954b62..e886d299813c 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -56,6 +56,8 @@ struct mtk_drm_crtc { struct cmdq_pkt cmdq_handle; u32 cmdq_event; u32 cmdq_vblank_cnt; + bool blocking_config; + struct completion cmplt; #endif struct device *mmsys_dev; @@ -584,8 +586,16 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc, */ mtk_crtc->cmdq_vblank_cnt = 3; + if (mtk_crtc->blocking_config) + init_completion(&mtk_crtc->cmplt); + mbox_send_message(mtk_crtc->cmdq_client.chan, cmdq_handle); mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0); + + if (mtk_crtc->blocking_config) { + wait_for_completion(&mtk_crtc->cmplt); + mtk_crtc->blocking_config = false; + } } #endif mtk_crtc->config_updating = false; @@ -698,7 +708,9 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc, plane_state->pending.config = true; } mtk_crtc->pending_planes = true; - +#if IS_REACHABLE(CONFIG_MTK_CMDQ) + mtk_crtc->blocking_config = true; +#endif mtk_drm_crtc_update_config(mtk_crtc, false); /* Wait for planes to be disabled */ drm_crtc_wait_one_vblank(crtc);