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[94.29.46.111]) by smtp.gmail.com with ESMTPSA id w14sm786844ljj.7.2021.12.11.13.38.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Dec 2021 13:38:06 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Sam Ravnborg , Rob Herring , David Airlie , Daniel Vetter , Svyatoslav Ryhel , Anton Bambura Subject: [PATCH v2 3/3] drm/panel: simple: Add support for HannStar HSD101PWW2 panel Date: Sun, 12 Dec 2021 00:36:53 +0300 Message-Id: <20211211213653.17700-4-digetx@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211211213653.17700-1-digetx@gmail.com> References: <20211211213653.17700-1-digetx@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Svyatoslav Ryhel Add definition of the HannStar HSD101PWW2 Rev0-A00/A01 LCD SuperIPS+ HD panel. Signed-off-by: Svyatoslav Ryhel Signed-off-by: Dmitry Osipenko --- drivers/gpu/drm/panel/panel-simple.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index dde033066f3d..f86378ff32a5 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1927,6 +1927,31 @@ static const struct panel_desc hannstar_hsd100pxn1 = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; +static const struct display_timing hannstar_hsd101pww2_timing = { + .pixelclock = { 64300000, 71100000, 82000000 }, + .hactive = { 1280, 1280, 1280 }, + .hfront_porch = { 1, 1, 10 }, + .hback_porch = { 1, 1, 10 }, + .hsync_len = { 58, 158, 661 }, + .vactive = { 800, 800, 800 }, + .vfront_porch = { 1, 1, 10 }, + .vback_porch = { 1, 1, 10 }, + .vsync_len = { 1, 21, 203 }, + .flags = DISPLAY_FLAGS_DE_HIGH, +}; + +static const struct panel_desc hannstar_hsd101pww2 = { + .timings = &hannstar_hsd101pww2_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 217, + .height = 136, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type = DRM_MODE_CONNECTOR_LVDS, +}; + static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = { .clock = 33333, .hdisplay = 800, @@ -3775,6 +3800,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "hannstar,hsd100pxn1", .data = &hannstar_hsd100pxn1, + }, { + .compatible = "hannstar,hsd101pww2", + .data = &hannstar_hsd101pww2, }, { .compatible = "hit,tx23d38vm0caa", .data = &hitachi_tx23d38vm0caa