@@ -138,17 +138,6 @@ guc_create_parallel(struct intel_engine_cs **engines,
#define GUC_REQUEST_SIZE 64 /* bytes */
-/*
- * We reserve 1/16 of the guc_ids for multi-lrc as these need to be contiguous
- * per the GuC submission interface. A different allocation algorithm is used
- * (bitmap vs. ida) between multi-lrc and single-lrc hence the reason to
- * partition the guc_id space. We believe the number of multi-lrc contexts in
- * use should be low and 1/16 should be sufficient. Minimum of 32 guc_ids for
- * multi-lrc.
- */
-#define NUMBER_MULTI_LRC_GUC_ID(guc) \
- ((guc)->submission_state.num_guc_ids / 16)
-
/*
* Below is a set of functions which control the GuC scheduling state which
* require a lock.
@@ -1777,11 +1766,6 @@ int intel_guc_submission_init(struct intel_guc *guc)
INIT_WORK(&guc->submission_state.destroyed_worker,
destroyed_worker_func);
- guc->submission_state.guc_ids_bitmap =
- bitmap_zalloc(NUMBER_MULTI_LRC_GUC_ID(guc), GFP_KERNEL);
- if (!guc->submission_state.guc_ids_bitmap)
- return -ENOMEM;
-
spin_lock_init(&guc->timestamp.lock);
INIT_DELAYED_WORK(&guc->timestamp.work, guc_timestamp_ping);
guc->timestamp.ping_delay = (POLL_TIME_CLKS / gt->clock_frequency + 1) * HZ;
@@ -1864,6 +1848,57 @@ static void guc_submit_request(struct i915_request *rq)
spin_unlock_irqrestore(&sched_engine->lock, flags);
}
+/*
+ * We reserve 1/16 of the guc_ids for multi-lrc as these need to be contiguous
+ * per the GuC submission interface. A different allocation algorithm is used
+ * (bitmap vs. ida) between multi-lrc and single-lrc hence the reason to
+ * partition the guc_id space. We believe the number of multi-lrc contexts in
+ * use should be low and 1/16 should be sufficient.
+ */
+#define MLRC_GUC_ID_RATIO 16
+
+static int number_mlrc_guc_id(struct intel_guc *guc)
+{
+ return guc->submission_state.num_guc_ids / MLRC_GUC_ID_RATIO;
+}
+
+static int number_slrc_guc_id(struct intel_guc *guc)
+{
+ return guc->submission_state.num_guc_ids - number_mlrc_guc_id(guc);
+}
+
+static int mlrc_guc_id_base(struct intel_guc *guc)
+{
+ return number_slrc_guc_id(guc);
+}
+
+static int new_mlrc_guc_id(struct intel_guc *guc, struct intel_context *ce)
+{
+ int ret;
+
+ GEM_BUG_ON(!intel_context_is_parent(ce));
+ GEM_BUG_ON(!guc->submission_state.guc_ids_bitmap);
+
+ ret = bitmap_find_free_region(guc->submission_state.guc_ids_bitmap,
+ number_mlrc_guc_id(guc),
+ order_base_2(ce->parallel.number_children
+ + 1));
+ if (unlikely(ret < 0))
+ return ret;
+
+ return ret + mlrc_guc_id_base(guc);
+}
+
+static int new_slrc_guc_id(struct intel_guc *guc, struct intel_context *ce)
+{
+ GEM_BUG_ON(intel_context_is_parent(ce));
+
+ return ida_simple_get(&guc->submission_state.guc_ids,
+ 0, number_slrc_guc_id(guc),
+ GFP_KERNEL | __GFP_RETRY_MAYFAIL |
+ __GFP_NOWARN);
+}
+
static int new_guc_id(struct intel_guc *guc, struct intel_context *ce)
{
int ret;
@@ -1871,16 +1906,10 @@ static int new_guc_id(struct intel_guc *guc, struct intel_context *ce)
GEM_BUG_ON(intel_context_is_child(ce));
if (intel_context_is_parent(ce))
- ret = bitmap_find_free_region(guc->submission_state.guc_ids_bitmap,
- NUMBER_MULTI_LRC_GUC_ID(guc),
- order_base_2(ce->parallel.number_children
- + 1));
+ ret = new_mlrc_guc_id(guc, ce);
else
- ret = ida_simple_get(&guc->submission_state.guc_ids,
- NUMBER_MULTI_LRC_GUC_ID(guc),
- guc->submission_state.num_guc_ids,
- GFP_KERNEL | __GFP_RETRY_MAYFAIL |
- __GFP_NOWARN);
+ ret = new_slrc_guc_id(guc, ce);
+
if (unlikely(ret < 0))
return ret;
@@ -1990,6 +2019,15 @@ static int pin_guc_id(struct intel_guc *guc, struct intel_context *ce)
GEM_BUG_ON(atomic_read(&ce->guc_id.ref));
+ /* Outside spin lock so we can sleep on alloc */
+ if (unlikely(intel_context_is_parent(ce) &&
+ !guc->submission_state.guc_ids_bitmap)) {
+ guc->submission_state.guc_ids_bitmap =
+ bitmap_zalloc(number_mlrc_guc_id(guc), GFP_KERNEL);
+ if (!guc->submission_state.guc_ids_bitmap)
+ return -ENOMEM;
+ }
+
try_again:
spin_lock_irqsave(&guc->submission_state.lock, flags);
Move the multi-lrc guc_id from the lower allocation partition (0 to number of multi-lrc guc_ids) to upper allocation partition (number of single-lrc to max guc_ids). This will help when a native driver transitions to a PF after driver load time. If the perma-pin guc_ids (kernel contexts) are in a low range it is easy reduce total number of guc_ids as the allocated slrc are in a valid range the mlrc range moves to an unused range. Assuming no mlrc are allocated and few slrc are used the native to PF transition is seamless for the guc_id resource. v2: (Michal / Tvrtko) - Add an explaination to commit message of why this patch is needed (Michal / Piotr) - Replace marcos with functions (Michal) - Rework logic flow in new_mlrc_guc_id - Unconditionally call bitmap_free Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 88 +++++++++++++------ 1 file changed, 63 insertions(+), 25 deletions(-)