| Message ID | 20220216181712.1493400-3-15330273260@189.cn (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/lsdc: add drm driver for loongson display controller | expand |
在 2022/2/16 18:17, Sui Jingfeng 写道: > From: suijingfeng <suijingfeng@loongson.cn> > > The display controller is a pci device, its PCI vendor id is 0x0014 > its PCI device id is 0x7a06. > > 1) In order to let the lsdc kms driver to know which chip the DC is > contained in, we add different compatible for different chip. > > 2) Add display controller device node for ls2k1000 SoC > > Signed-off-by: suijingfeng <suijingfeng@loongson.cn> > Signed-off-by: Sui Jingfeng <15330273260@189.cn> > --- > .../loongson/loongson,display-controller.yaml | 114 ++++++++++++++++++ > .../display/loongson/loongson-drm.txt | 16 +++ ^ Is loongson-drm.txt intentional? It seems irrelevant.... Thanks. > .../boot/dts/loongson/loongson64-2k1000.dtsi | 8 ++ > arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 +- > 4 files changed, 140 insertions(+), 5 deletions(-) > create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml > create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson-drm.txt [...] - Jiaxun
On 16/02/2022 19:17, Sui Jingfeng wrote: > From: suijingfeng <suijingfeng@loongson.cn> > > The display controller is a pci device, its PCI vendor id is 0x0014 > its PCI device id is 0x7a06. > > 1) In order to let the lsdc kms driver to know which chip the DC is > contained in, we add different compatible for different chip. > > 2) Add display controller device node for ls2k1000 SoC > > Signed-off-by: suijingfeng <suijingfeng@loongson.cn> > Signed-off-by: Sui Jingfeng <15330273260@189.cn> > --- > .../loongson/loongson,display-controller.yaml | 114 ++++++++++++++++++ > .../display/loongson/loongson-drm.txt | 16 +++ Please split dt-bindings from other changes into a separate patch, which should be first in the series. > .../boot/dts/loongson/loongson64-2k1000.dtsi | 8 ++ > arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 +- > 4 files changed, 140 insertions(+), 5 deletions(-) > create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml > create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson-drm.txt > > diff --git a/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml > new file mode 100644 > index 000000000000..64d8364b50ab > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml > @@ -0,0 +1,114 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/pci0014,7a06.yaml# The file name looks different than ID. Does this pass `make dt_binding_check` validation? > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Loongson LS7A2000/LS7A1000/LS2K1000/LS2K0500 Display Controller Device Tree Bindings > + > +maintainers: > + - Sui Jingfeng <suijingfeng@loongson.cn> > + > +description: |+ > + > + Loongson display controllers are simple which require scanout buffers > + to be physically contiguous. LS2K1000/LS2K0500 is a SOC, only system > + memory is available. LS7A1000/LS7A2000 is bridge chip which is equipped > + with a dedicated video ram which is 64MB or more. > + > + For LS7A1000, there are 4 dedicated GPIOs whose control register is > + located at the DC register space. They are used to emulate two way i2c, > + One for DVO0, another for DVO1. > + > + LS2K1000 and LS2K0500 SoC grab i2c adapter from other module, either > + general purpose GPIO emulated i2c or hardware i2c in the SoC. > + > + LSDC has two display pipes, each way has a DVO interface which provide > + RGB888 signals, vertical & horizontal synchronisations, data enable and > + the pixel clock. LSDC has two CRTC, each CRTC is able to scanout from > + 1920x1080 resolution at 60Hz. Each CRTC has two FB address registers. > + > + LSDC's display pipeline have several components as below description, > + > + The display controller in LS7A1000: > + ___________________ _________ > + | -------| | | > + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monotor | > + | _ _ -------| ^ ^ |_________| > + | | | | | -------| | | > + | |_| |_| | i2c0 <--------+-------------+ > + | -------| > + | DC IN LS7A1000 | > + | _ _ -------| > + | | | | | | i2c1 <--------+-------------+ > + | |_| |_| -------| | | _________ > + | -------| | | | | > + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel | > + | -------| |_________| > + |___________________| > + > + Simple usage of LS7A1000 with LS3A4000 CPU: > + > + +------+ +-----------------------------------+ > + | DDR4 | | +-------------------+ | > + +------+ | | PCIe Root complex | LS7A1000 | > + || MC0 | +--++---------++----+ | > + +----------+ HT 3.0 | || || | > + | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+ > + | CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM | > + +----------+ | +--------+ +-+--+-+ +---------+ +------+ > + || MC1 +---------------|--|----------------+ > + +------+ | | > + | DDR4 | +-------+ DVO0 | | DVO1 +------+ > + +------+ VGA <--|ADV7125|<--------+ +-------->|TFP410|--> DVI/HDMI > + +-------+ +------+ > + > + The display controller in LS2K1000/LS2K0500: > + ___________________ _________ > + | -------| | | > + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monotor | > + | _ _ -------| ^ ^ |_________| > + | | | | | | | | > + | |_| |_| | +------+ | > + | <---->| i2c0 |<---------+ > + | DC IN LS2K1000 | +------+ > + | _ _ | +------+ > + | | | | | <---->| i2c1 |----------+ > + | |_| |_| | +------+ | _________ > + | -------| | | | | > + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel | > + | -------| |_________| > + |___________________| > + > +properties: > + compatible: > + enum: > + - loongson,ls7a2000-dc > + - loongson,ls7a1000-dc > + - loongson,ls2k1000-dc > + - loongson,ls2k0500-dc > + > + reg: > + maxItems: 1 > + > + interrupts: > + minItems: 1 You need also maxItems. If you have only one interrupt, then just maxItems:1. > + > +required: > + - compatible > + - reg > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + lsdc: dc@6,1 { node name should be generic: "display-controller" The unit address does not look like matching the reg property. Is this how it suppose to be? > + compatible = "loongson,ls7a1000-dc"; > + reg = <0x3100 0x0 0x0 0x0 0x0>; > + interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&pic>; > + }; > + > +... Best regards, Krzysztof
On 2022/2/17 16:42, Krzysztof Kozlowski wrote: >> .../boot/dts/loongson/loongson64-2k1000.dtsi | 8 ++ >> arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 +- >> 4 files changed, 140 insertions(+), 5 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml >> create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson-drm.txt >> >> diff --git a/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml >> new file mode 100644 >> index 000000000000..64d8364b50ab >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml >> @@ -0,0 +1,114 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id:http://devicetree.org/schemas/display/pci0014,7a06.yaml# > The file name looks different than ID. Does this pass `make > dt_binding_check` validation? > I run make dt_binding_check, it say 'dt-doc-validate' not found! Ensure dtschema python package is installed and in your PATH. Current PATH is: /usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/snap/bin make[1]: *** [Documentation/devicetree/bindings/Makefile:12: check_dtschema_version] Error 1 make: *** [Makefile:1398: dt_binding_check] Error 2
On Thu, 17 Feb 2022 02:17:11 +0800, Sui Jingfeng wrote: > From: suijingfeng <suijingfeng@loongson.cn> > > The display controller is a pci device, its PCI vendor id is 0x0014 > its PCI device id is 0x7a06. > > 1) In order to let the lsdc kms driver to know which chip the DC is > contained in, we add different compatible for different chip. > > 2) Add display controller device node for ls2k1000 SoC > > Signed-off-by: suijingfeng <suijingfeng@loongson.cn> > Signed-off-by: Sui Jingfeng <15330273260@189.cn> > --- > .../loongson/loongson,display-controller.yaml | 114 ++++++++++++++++++ > .../display/loongson/loongson-drm.txt | 16 +++ > .../boot/dts/loongson/loongson64-2k1000.dtsi | 8 ++ > arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 +- > 4 files changed, 140 insertions(+), 5 deletions(-) > create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml > create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson-drm.txt > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: ./Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml: $id: relative path/filename doesn't match actual path or filename expected: http://devicetree.org/schemas/display/loongson/loongson,display-controller.yaml# Error: Documentation/devicetree/bindings/display/loongson/loongson,display-controller.example.dts:22.30-31 syntax error FATAL ERROR: Unable to parse input tree make[1]: *** [scripts/Makefile.lib:378: Documentation/devicetree/bindings/display/loongson/loongson,display-controller.example.dt.yaml] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1398: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1593886 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On 2022/2/18 00:39, Rob Herring wrote: > On Thu, 17 Feb 2022 02:17:11 +0800, Sui Jingfeng wrote: >> From: suijingfeng <suijingfeng@loongson.cn> >> >> The display controller is a pci device, its PCI vendor id is 0x0014 >> its PCI device id is 0x7a06. >> >> 1) In order to let the lsdc kms driver to know which chip the DC is >> contained in, we add different compatible for different chip. >> >> 2) Add display controller device node for ls2k1000 SoC >> >> Signed-off-by: suijingfeng <suijingfeng@loongson.cn> >> Signed-off-by: Sui Jingfeng <15330273260@189.cn> >> --- >> .../loongson/loongson,display-controller.yaml | 114 ++++++++++++++++++ >> .../display/loongson/loongson-drm.txt | 16 +++ >> .../boot/dts/loongson/loongson64-2k1000.dtsi | 8 ++ >> arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 +- >> 4 files changed, 140 insertions(+), 5 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml >> create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson-drm.txt >> > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > ./Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml: $id: relative path/filename doesn't match actual path or filename > expected: http://devicetree.org/schemas/display/loongson/loongson,display-controller.yaml# > Error: Documentation/devicetree/bindings/display/loongson/loongson,display-controller.example.dts:22.30-31 syntax error > FATAL ERROR: Unable to parse input tree > make[1]: *** [scripts/Makefile.lib:378: Documentation/devicetree/bindings/display/loongson/loongson,display-controller.example.dt.yaml] Error 1 > make[1]: *** Waiting for unfinished jobs.... > make: *** [Makefile:1398: dt_binding_check] Error 2 > > doc reference errors (make refcheckdocs): > > See https://patchwork.ozlabs.org/patch/1593886 > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. > Ok, I know that now, thank for you point it to me.
diff --git a/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml new file mode 100644 index 000000000000..64d8364b50ab --- /dev/null +++ b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/pci0014,7a06.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson LS7A2000/LS7A1000/LS2K1000/LS2K0500 Display Controller Device Tree Bindings + +maintainers: + - Sui Jingfeng <suijingfeng@loongson.cn> + +description: |+ + + Loongson display controllers are simple which require scanout buffers + to be physically contiguous. LS2K1000/LS2K0500 is a SOC, only system + memory is available. LS7A1000/LS7A2000 is bridge chip which is equipped + with a dedicated video ram which is 64MB or more. + + For LS7A1000, there are 4 dedicated GPIOs whose control register is + located at the DC register space. They are used to emulate two way i2c, + One for DVO0, another for DVO1. + + LS2K1000 and LS2K0500 SoC grab i2c adapter from other module, either + general purpose GPIO emulated i2c or hardware i2c in the SoC. + + LSDC has two display pipes, each way has a DVO interface which provide + RGB888 signals, vertical & horizontal synchronisations, data enable and + the pixel clock. LSDC has two CRTC, each CRTC is able to scanout from + 1920x1080 resolution at 60Hz. Each CRTC has two FB address registers. + + LSDC's display pipeline have several components as below description, + + The display controller in LS7A1000: + ___________________ _________ + | -------| | | + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monotor | + | _ _ -------| ^ ^ |_________| + | | | | | -------| | | + | |_| |_| | i2c0 <--------+-------------+ + | -------| + | DC IN LS7A1000 | + | _ _ -------| + | | | | | | i2c1 <--------+-------------+ + | |_| |_| -------| | | _________ + | -------| | | | | + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel | + | -------| |_________| + |___________________| + + Simple usage of LS7A1000 with LS3A4000 CPU: + + +------+ +-----------------------------------+ + | DDR4 | | +-------------------+ | + +------+ | | PCIe Root complex | LS7A1000 | + || MC0 | +--++---------++----+ | + +----------+ HT 3.0 | || || | + | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+ + | CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM | + +----------+ | +--------+ +-+--+-+ +---------+ +------+ + || MC1 +---------------|--|----------------+ + +------+ | | + | DDR4 | +-------+ DVO0 | | DVO1 +------+ + +------+ VGA <--|ADV7125|<--------+ +-------->|TFP410|--> DVI/HDMI + +-------+ +------+ + + The display controller in LS2K1000/LS2K0500: + ___________________ _________ + | -------| | | + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monotor | + | _ _ -------| ^ ^ |_________| + | | | | | | | | + | |_| |_| | +------+ | + | <---->| i2c0 |<---------+ + | DC IN LS2K1000 | +------+ + | _ _ | +------+ + | | | | | <---->| i2c1 |----------+ + | |_| |_| | +------+ | _________ + | -------| | | | | + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel | + | -------| |_________| + |___________________| + +properties: + compatible: + enum: + - loongson,ls7a2000-dc + - loongson,ls7a1000-dc + - loongson,ls2k1000-dc + - loongson,ls2k0500-dc + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + lsdc: dc@6,1 { + compatible = "loongson,ls7a1000-dc"; + reg = <0x3100 0x0 0x0 0x0 0x0>; + interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pic>; + }; + +... + diff --git a/Documentation/devicetree/bindings/display/loongson/loongson-drm.txt b/Documentation/devicetree/bindings/display/loongson/loongson-drm.txt new file mode 100644 index 000000000000..46417e0e34ba --- /dev/null +++ b/Documentation/devicetree/bindings/display/loongson/loongson-drm.txt @@ -0,0 +1,16 @@ +Loongson display controller +=========================== + +Required properties: +- compatible: Should be "loongson,display-subsystem" or "loongson,ls-fb" +- reg: should be register base and length +- interrupts: Should contain the cores interrupt line + +example: + +lsdc: dc@0x400c0000 { + compatible = "loongson,display-subsystem", "loongson,ls-fb"; + reg = <0x400c0000 0x00010000>; + interrupt-parent = <&icu>; + interrupts = <36>; +}; diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi index 768cf2abcea3..47f6ff4c3e8a 100644 --- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi +++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi @@ -209,6 +209,14 @@ gpu@5,0 { interrupt-parent = <&liointc0>; }; + lsdc: dc@6,0 { + compatible = "loongson,ls2k1000-dc"; + + reg = <0x3000 0x0 0x0 0x0 0x0>; + interrupts = <28 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&liointc0>; + }; + pci_bridge@9,0 { compatible = "pci0014,7a19.0", "pci0014,7a19", diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi index 2f45fce2cdc4..b34426142453 100644 --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi @@ -160,11 +160,8 @@ gpu@6,0 { interrupt-parent = <&pic>; }; - dc@6,1 { - compatible = "pci0014,7a06.0", - "pci0014,7a06", - "pciclass030000", - "pciclass0300"; + lsdc: dc@6,1 { + compatible = "loongson,ls7a1000-dc"; reg = <0x3100 0x0 0x0 0x0 0x0>; interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;