From patchwork Tue Feb 22 10:07:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TmFuY3kgTGluICjmnpfmrKPonqIp?= X-Patchwork-Id: 12754724 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 97A63C433FE for ; Tue, 22 Feb 2022 10:08:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8819010E8E7; Tue, 22 Feb 2022 10:07:59 +0000 (UTC) Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1E8F010E843 for ; Tue, 22 Feb 2022 10:07:50 +0000 (UTC) X-UUID: 814c3b05cd9b4fd6aa2cf9cf045ebd2c-20220222 X-UUID: 814c3b05cd9b4fd6aa2cf9cf045ebd2c-20220222 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1231041968; Tue, 22 Feb 2022 18:07:46 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Tue, 22 Feb 2022 18:07:44 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 22 Feb 2022 18:07:44 +0800 From: Nancy.Lin To: CK Hu Subject: [PATCH v12 15/23] drm/mediatek: add display merge async reset control Date: Tue, 22 Feb 2022 18:07:33 +0800 Message-ID: <20220222100741.30138-16-nancy.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220222100741.30138-1-nancy.lin@mediatek.com> References: <20220222100741.30138-1-nancy.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chun-Kuang Hu , srv_heupstream@mediatek.com, devicetree@vger.kernel.org, David Airlie , "jason-jh . lin" , singo.chang@mediatek.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Yongqiang Niu , Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , "Nancy . Lin" , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add merge async reset control in mtk_merge_stop. Async hw doesn't do self reset on each sof signal(start of frame), so need to reset the async to clear the hw status for the next merge start. Signed-off-by: Nancy.Lin Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_merge.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/mediatek/mtk_disp_merge.c index 9dca145cfb71..177473fa8160 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "mtk_drm_ddp_comp.h" @@ -79,6 +80,9 @@ void mtk_merge_stop(struct device *dev) struct mtk_disp_merge *priv = dev_get_drvdata(dev); mtk_merge_stop_cmdq(dev, NULL); + + if (priv->async_clk) + device_reset_optional(dev); } void mtk_merge_start_cmdq(struct device *dev, struct cmdq_pkt *cmdq_pkt)