From patchwork Fri Mar 4 00:25:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 12768338 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E581C433EF for ; Fri, 4 Mar 2022 00:25:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1181010E264; Fri, 4 Mar 2022 00:25:43 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id D838C10E343 for ; Fri, 4 Mar 2022 00:25:41 +0000 (UTC) Received: from tr.lan (ip-89-176-112-137.net.upcbroadband.cz [89.176.112.137]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 2279983B5B; Fri, 4 Mar 2022 01:25:40 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1646353540; bh=Gh/DZQoxuhU+in50e9RSd+bDyoBbfWHRy2GYPzpCOZ4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZfqCfPEAPFwdZu7T2j+R3BE07FFM8eY/GO4NZ1Y4o9QtmXlGIU+5xN/n5fCGpVAw6 tXG7EHsMy4FpkhD/IQarr5N9l/xTiTzRY1jt7CLNtg5YJ5Mve3+muAoAfX8sq16PBR llvVGEuyzt/QI8ESnq67hEXjVnEXASOqkunbw9YT/RrOZCg8Y7NjJVAhl6kW4qDcWx iDJz010yk1ml6eb6JIpmxMMbBmTRal2aRCegsTaosKk8bIRuwpK3Buygc3PNuQIPaK f1tIHpQhr54xx+8yU4AeAMLtRLFV5YBN1b0MqbFqh+RtRQteV4VVxTZdg1OLfPTcXQ lcxSoe5aNodPg== From: Marek Vasut To: dri-devel@lists.freedesktop.org Subject: [PATCH V3 05/13] drm: bridge: icn6211: Add DSI lane count DT property parsing Date: Fri, 4 Mar 2022 01:25:00 +0100 Message-Id: <20220304002508.75676-6-marex@denx.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220304002508.75676-1-marex@denx.de> References: <20220304002508.75676-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Robert Foss , Jagan Teki , Thomas Zimmermann , Sam Ravnborg , Maxime Ripard Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The driver currently hard-codes DSI lane count to two, however the chip is capable of operating in 1..4 DSI lanes mode. Parse 'data-lanes' DT property and program the result into DSI_CTRL register. Signed-off-by: Marek Vasut Cc: Jagan Teki Cc: Maxime Ripard Cc: Robert Foss Cc: Sam Ravnborg Cc: Thomas Zimmermann To: dri-devel@lists.freedesktop.org --- V2: Rebase on next-20220214 V3: Default to 4 data lanes unless specified otherwise --- drivers/gpu/drm/bridge/chipone-icn6211.c | 45 +++++++++++++++++++++--- 1 file changed, 41 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c b/drivers/gpu/drm/bridge/chipone-icn6211.c index 2ac8eb7e25f52..df8e75a068ad0 100644 --- a/drivers/gpu/drm/bridge/chipone-icn6211.c +++ b/drivers/gpu/drm/bridge/chipone-icn6211.c @@ -136,10 +136,12 @@ struct chipone { struct drm_bridge bridge; struct drm_display_mode mode; struct drm_bridge *panel_bridge; + struct device_node *host_node; struct gpio_desc *enable_gpio; struct regulator *vdd1; struct regulator *vdd2; struct regulator *vdd3; + int dsi_lanes; }; static inline struct chipone *bridge_to_chipone(struct drm_bridge *bridge) @@ -212,6 +214,11 @@ static void chipone_atomic_enable(struct drm_bridge *bridge, /* dsi specific sequence */ ICN6211_DSI(icn, SYNC_EVENT_DLY, 0x80); ICN6211_DSI(icn, HFP_MIN, hfp & 0xff); + + /* DSI data lane count */ + ICN6211_DSI(icn, DSI_CTRL, + DSI_CTRL_UNKNOWN | DSI_CTRL_DSI_LANES(icn->dsi_lanes - 1)); + ICN6211_DSI(icn, MIPI_PD_CK_LANE, 0xa0); ICN6211_DSI(icn, PLL_CTRL(12), 0xff); @@ -314,7 +321,9 @@ static const struct drm_bridge_funcs chipone_bridge_funcs = { static int chipone_parse_dt(struct chipone *icn) { struct device *dev = icn->dev; + struct device_node *endpoint; struct drm_panel *panel; + int dsi_lanes; int ret; icn->vdd1 = devm_regulator_get_optional(dev, "vdd1"); @@ -350,15 +359,42 @@ static int chipone_parse_dt(struct chipone *icn) return PTR_ERR(icn->enable_gpio); } + endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 0, 0); + dsi_lanes = of_property_count_u32_elems(endpoint, "data-lanes"); + icn->host_node = of_graph_get_remote_port_parent(endpoint); + of_node_put(endpoint); + + if (!icn->host_node) + return -ENODEV; + + /* + * If the 'data-lanes' property does not exist in DT or is invalid, + * default to previously hard-coded behavior, which was 4 data lanes. + */ + if (dsi_lanes < 0) { + icn->dsi_lanes = 4; + } else if (dsi_lanes > 4) { + ret = -EINVAL; + goto err_data_lanes; + } else { + icn->dsi_lanes = dsi_lanes; + } + ret = drm_of_find_panel_or_bridge(dev->of_node, 1, 0, &panel, NULL); if (ret) - return ret; + goto err_data_lanes; icn->panel_bridge = devm_drm_panel_bridge_add(dev, panel); - if (IS_ERR(icn->panel_bridge)) - return PTR_ERR(icn->panel_bridge); + if (IS_ERR(icn->panel_bridge)) { + ret = PTR_ERR(icn->panel_bridge); + goto err_data_lanes; + } return 0; + +err_data_lanes: + of_node_put(icn->host_node); + return ret; } static int chipone_probe(struct mipi_dsi_device *dsi) @@ -384,7 +420,7 @@ static int chipone_probe(struct mipi_dsi_device *dsi) drm_bridge_add(&icn->bridge); - dsi->lanes = 4; + dsi->lanes = icn->dsi_lanes; dsi->format = MIPI_DSI_FMT_RGB888; dsi->mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE; @@ -403,6 +439,7 @@ static int chipone_remove(struct mipi_dsi_device *dsi) mipi_dsi_detach(dsi); drm_bridge_remove(&icn->bridge); + of_node_put(icn->host_node); return 0; }