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[v7,1/9] drm/i915/gt: use engine instance directly for offset

Message ID 20220328190736.19697-2-ramalingam.c@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/ttm: Evict and restore of compressed object | expand

Commit Message

Ramalingam C March 28, 2022, 7:07 p.m. UTC
To make it uniform across copy and clear, use the engine offset directly
to calculate the offset in the cmd forming for emit_clear.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

Comments

Hellstrom, Thomas March 29, 2022, 6:27 a.m. UTC | #1
On Tue, 2022-03-29 at 00:37 +0530, Ramalingam C wrote:
> To make it uniform across copy and clear, use the engine offset
> directly
> to calculate the offset in the cmd forming for emit_clear.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_migrate.c | 11 ++++-------
>  1 file changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c
> b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 20444d6ceb3c..9e6c98a17441 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -614,15 +614,13 @@ intel_context_migrate_copy(struct intel_context
> *ce,
>         return err;
>  }
>  
> -static int emit_clear(struct i915_request *rq, u64 offset, int size,
> u32 value)
> +static int emit_clear(struct i915_request *rq, u32 offset, int size,
> u32 value)
>  {
>         const int ver = GRAPHICS_VER(rq->engine->i915);
>         u32 *cs;
>  
>         GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
>  
> -       offset += (u64)rq->engine->instance << 32;
> -
>         cs = intel_ring_begin(rq, ver >= 8 ? 8 : 6);
>         if (IS_ERR(cs))
>                 return PTR_ERR(cs);
> @@ -632,17 +630,16 @@ static int emit_clear(struct i915_request *rq,
> u64 offset, int size, u32 value)
>                 *cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY |
> PAGE_SIZE;
>                 *cs++ = 0;
>                 *cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
> -               *cs++ = lower_32_bits(offset);
> -               *cs++ = upper_32_bits(offset);
> +               *cs++ = offset;
> +               *cs++ = rq->engine->instance;
>                 *cs++ = value;
>                 *cs++ = MI_NOOP;
>         } else {
> -               GEM_BUG_ON(upper_32_bits(offset));

GEM_BUG_ON(rq->engine->instance); ?

With that fixed,
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>



>                 *cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (6 - 2);
>                 *cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY |
> PAGE_SIZE;
>                 *cs++ = 0;
>                 *cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
> -               *cs++ = lower_32_bits(offset);
> +               *cs++ = offset;
>                 *cs++ = value;
>         }
>  

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diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 20444d6ceb3c..9e6c98a17441 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -614,15 +614,13 @@  intel_context_migrate_copy(struct intel_context *ce,
 	return err;
 }
 
-static int emit_clear(struct i915_request *rq, u64 offset, int size, u32 value)
+static int emit_clear(struct i915_request *rq, u32 offset, int size, u32 value)
 {
 	const int ver = GRAPHICS_VER(rq->engine->i915);
 	u32 *cs;
 
 	GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
 
-	offset += (u64)rq->engine->instance << 32;
-
 	cs = intel_ring_begin(rq, ver >= 8 ? 8 : 6);
 	if (IS_ERR(cs))
 		return PTR_ERR(cs);
@@ -632,17 +630,16 @@  static int emit_clear(struct i915_request *rq, u64 offset, int size, u32 value)
 		*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
 		*cs++ = 0;
 		*cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
-		*cs++ = lower_32_bits(offset);
-		*cs++ = upper_32_bits(offset);
+		*cs++ = offset;
+		*cs++ = rq->engine->instance;
 		*cs++ = value;
 		*cs++ = MI_NOOP;
 	} else {
-		GEM_BUG_ON(upper_32_bits(offset));
 		*cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (6 - 2);
 		*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
 		*cs++ = 0;
 		*cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
-		*cs++ = lower_32_bits(offset);
+		*cs++ = offset;
 		*cs++ = value;
 	}