From patchwork Fri Jun 10 10:55:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 12877435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0392BC43334 for ; Fri, 10 Jun 2022 10:55:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 55BB910E205; Fri, 10 Jun 2022 10:55:37 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2DA4E10E165 for ; Fri, 10 Jun 2022 10:55:33 +0000 (UTC) X-UUID: a6adc6f793e04be3994c994e3590af2d-20220610 X-CID-P-RULE: Spam_GS6885AD X-CID-O-INFO: VERSION:1.1.5, REQID:af9720a6-dc48-4319-a8f0-8734f015d776, OB:0, LO B:40,IP:0,URL:25,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS6885A D,ACTION:quarantine,TS:115 X-CID-INFO: VERSION:1.1.5, REQID:af9720a6-dc48-4319-a8f0-8734f015d776, OB:0, LOB: 40,IP:0,URL:25,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D, ACTION:quarantine,TS:115 X-CID-META: VersionHash:2a19b09, CLOUDID:912ff27e-c8dc-403a-96e8-6237210dceee, C OID:FAIL,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,URL:1,Fil e:nil,QS:0,BEC:nil X-UUID: a6adc6f793e04be3994c994e3590af2d-20220610 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 323076661; Fri, 10 Jun 2022 18:55:24 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Fri, 10 Jun 2022 18:55:23 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Fri, 10 Jun 2022 18:55:23 +0800 From: Bo-Chen Chen To: , , , , , , , , , Subject: [PATCH v11 01/10] dt-bindings: mediatek,dp: Add Display Port binding Date: Fri, 10 Jun 2022 18:55:13 +0800 Message-ID: <20220610105522.13449-2-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220610105522.13449-1-rex-bc.chen@mediatek.com> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-fbdev@vger.kernel.org, granquet@baylibre.com, jitao.shi@mediatek.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, msp@baylibre.com, Project_Global_Chrome_Upstream_Group@mediatek.com, Bo-Chen Chen , linux-mediatek@lists.infradead.org, wenst@chromium.org, linux-arm-kernel@lists.infradead.org, angelogioacchino.delregno@collabora.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Markus Schneider-Pargmann This controller is present on several mediatek hardware. Currently mt8195 and mt8395 have this controller without a functional difference, so only one compatible field is added. The controller can have two forms, as a normal display port and as an embedded display port. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Guillaume Ranquet [Bo-Chen: Fix reviewers' comment] Signed-off-by: Bo-Chen Chen --- .../display/mediatek/mediatek,dp.yaml | 101 ++++++++++++++++++ 1 file changed, 101 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml new file mode 100644 index 000000000000..10f50a0dcf49 --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Display Port Controller + +maintainers: + - Chun-Kuang Hu + - Jitao shi + +description: | + Device tree bindings for the MediaTek display port and + embedded display port controller present on some MediaTek SoCs. + +properties: + compatible: + enum: + - mediatek,mt8195-dp-tx + - mediatek,mt8195-edp-tx + + reg: + maxItems: 1 + + nvmem-cells: + maxItems: 1 + description: efuse data for display port calibration + + nvmem-cell-names: + const: dp_calibration_data + + power-domains: + maxItems: 1 + + interrupts: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input endpoint of the controller, usually dp_intf + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output endpoint of the controller + + required: + - port@0 + - port@1 + + max-lanes: + maxItems: 1 + description: maximum number of lanes supported by the hardware. + + max-linkrate: + maxItems: 1 + description: maximum link rate supported by the hardware and unit is MHz. + +required: + - compatible + - reg + - interrupts + - ports + - max-lanes + - max-linkrate + +additionalProperties: false + +examples: + - | + #include + #include + dp_tx@1c600000 { + compatible = "mediatek,mt8195-dp-tx"; + reg = <0x1c600000 0x8000>; + power-domains = <&spm MT8195_POWER_DOMAIN_DP_TX>; + interrupts = ; + max-lanes = /bits/ 8 <4>; + max-linkrate = /bits/ 16 <8100>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + edp_in: endpoint { + remote-endpoint = <&dp_intf0_out>; + }; + }; + port@1 { + reg = <1>; + edp_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + };