diff mbox series

[2/2] drm: bridge: icn6211: Add support for RGB/BGR swap

Message ID 20220801131901.183090-2-marex@denx.de (mailing list archive)
State New, archived
Headers show
Series [1/2] dt-bindings: display: bridge: icn6211: Add support for RGB/BGR swap | expand

Commit Message

Marek Vasut Aug. 1, 2022, 1:19 p.m. UTC 
The ICN6211 is capable of swapping the output DPI RGB/BGR color channels,
implement support for this and add DT property "blue-and-red-swap" to
select the RGB/BGR channel order.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: dri-devel@lists.freedesktop.org
---
 drivers/gpu/drm/bridge/chipone-icn6211.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c b/drivers/gpu/drm/bridge/chipone-icn6211.c
index 7ee1858bab321..7d64172373a35 100644
--- a/drivers/gpu/drm/bridge/chipone-icn6211.c
+++ b/drivers/gpu/drm/bridge/chipone-icn6211.c
@@ -30,6 +30,8 @@ 
 #define PD_CTRL(n)		(0x0a + ((n) & 0x3)) /* 0..3 */
 #define RST_CTRL(n)		(0x0e + ((n) & 0x1)) /* 0..1 */
 #define SYS_CTRL(n)		(0x10 + ((n) & 0x7)) /* 0..4 */
+#define SYS_CTRL_0_COLOR_ORDER_RGB	0x0
+#define SYS_CTRL_0_COLOR_ORDER_BGR	0x5
 #define SYS_CTRL_1_CLK_PHASE_MSK	GENMASK(5, 4)
 #define CLK_PHASE_0			0
 #define CLK_PHASE_1_4			1
@@ -155,6 +157,7 @@  struct chipone {
 	struct clk *refclk;
 	unsigned long refclk_rate;
 	bool interface_i2c;
+	bool color_swap;
 };
 
 static const struct regmap_range chipone_dsi_readable_ranges[] = {
@@ -426,7 +429,9 @@  static void chipone_atomic_enable(struct drm_bridge *bridge,
 	/* Configure PLL settings */
 	chipone_configure_pll(icn, mode);
 
-	chipone_writeb(icn, SYS_CTRL(0), 0x40);
+	chipone_writeb(icn, SYS_CTRL(0), 0x40 |
+		       (icn->color_swap ? SYS_CTRL_0_COLOR_ORDER_BGR :
+					  SYS_CTRL_0_COLOR_ORDER_RGB));
 	sys_ctrl_1 = 0x88;
 
 	if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE)
@@ -680,6 +685,9 @@  static int chipone_parse_dt(struct chipone *icn)
 		return PTR_ERR(icn->enable_gpio);
 	}
 
+	icn->color_swap = of_property_read_bool(dev->of_node,
+						"blue-and-red-swap");
+
 	icn->panel_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0);
 	if (IS_ERR(icn->panel_bridge))
 		return PTR_ERR(icn->panel_bridge);