| Message ID | 20220908155821.1662110-1-ashutosh.dixit@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/gt: Fix perf limit reasons bit positions | expand |
On Thu, 08 Sep 2022 08:58:21 -0700, Ashutosh Dixit wrote: > > Perf limit reasons bit positions were off by one. > > Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces") > Cc: stable@vger.kernel.org # v5.18+ > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > Acked-by: Andi Shyti <andi.shyti@linux.intel.com> > Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> I copied the A-b and R-b on this patch from: https://patchwork.freedesktop.org/patch/501919/?series=108091&rev=2 And have also copied stable just in case. Thanks. > --- > drivers/gpu/drm/i915/i915_reg.h | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index c413eec3373f..24009786f88b 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1794,14 +1794,14 @@ > > #define GT0_PERF_LIMIT_REASONS _MMIO(0x1381a8) > #define GT0_PERF_LIMIT_REASONS_MASK 0xde3 > -#define PROCHOT_MASK REG_BIT(1) > -#define THERMAL_LIMIT_MASK REG_BIT(2) > -#define RATL_MASK REG_BIT(6) > -#define VR_THERMALERT_MASK REG_BIT(7) > -#define VR_TDC_MASK REG_BIT(8) > -#define POWER_LIMIT_4_MASK REG_BIT(9) > -#define POWER_LIMIT_1_MASK REG_BIT(11) > -#define POWER_LIMIT_2_MASK REG_BIT(12) > +#define PROCHOT_MASK REG_BIT(0) > +#define THERMAL_LIMIT_MASK REG_BIT(1) > +#define RATL_MASK REG_BIT(5) > +#define VR_THERMALERT_MASK REG_BIT(6) > +#define VR_TDC_MASK REG_BIT(7) > +#define POWER_LIMIT_4_MASK REG_BIT(8) > +#define POWER_LIMIT_1_MASK REG_BIT(10) > +#define POWER_LIMIT_2_MASK REG_BIT(11) > > #define CHV_CLK_CTL1 _MMIO(0x101100) > #define VLV_CLK_CTL2 _MMIO(0x101104) > -- > 2.34.1 >
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c413eec3373f..24009786f88b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1794,14 +1794,14 @@ #define GT0_PERF_LIMIT_REASONS _MMIO(0x1381a8) #define GT0_PERF_LIMIT_REASONS_MASK 0xde3 -#define PROCHOT_MASK REG_BIT(1) -#define THERMAL_LIMIT_MASK REG_BIT(2) -#define RATL_MASK REG_BIT(6) -#define VR_THERMALERT_MASK REG_BIT(7) -#define VR_TDC_MASK REG_BIT(8) -#define POWER_LIMIT_4_MASK REG_BIT(9) -#define POWER_LIMIT_1_MASK REG_BIT(11) -#define POWER_LIMIT_2_MASK REG_BIT(12) +#define PROCHOT_MASK REG_BIT(0) +#define THERMAL_LIMIT_MASK REG_BIT(1) +#define RATL_MASK REG_BIT(5) +#define VR_THERMALERT_MASK REG_BIT(6) +#define VR_TDC_MASK REG_BIT(7) +#define POWER_LIMIT_4_MASK REG_BIT(8) +#define POWER_LIMIT_1_MASK REG_BIT(10) +#define POWER_LIMIT_2_MASK REG_BIT(11) #define CHV_CLK_CTL1 _MMIO(0x101100) #define VLV_CLK_CTL2 _MMIO(0x101104)
Perf limit reasons bit positions were off by one. Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces") Cc: stable@vger.kernel.org # v5.18+ Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Acked-by: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)