| Message ID | 20220927233821.8007-2-laurent.pinchart@ideasonboard.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm: lcdif: Improve YUV support | expand |
On 9/28/22 01:38, Laurent Pinchart wrote: > A couple of the register macro values are incorrectly indented. Fix > them. > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Marek Vasut <marex@denx.de>
Quoting Laurent Pinchart (2022-09-28 00:38:18) > A couple of the register macro values are incorrectly indented. Fix > them. > Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > drivers/gpu/drm/mxsfb/lcdif_regs.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mxsfb/lcdif_regs.h b/drivers/gpu/drm/mxsfb/lcdif_regs.h > index 8e8bef175bf2..013f2cace2a0 100644 > --- a/drivers/gpu/drm/mxsfb/lcdif_regs.h > +++ b/drivers/gpu/drm/mxsfb/lcdif_regs.h > @@ -130,7 +130,7 @@ > #define CTRL_FETCH_START_OPTION_BPV BIT(9) > #define CTRL_FETCH_START_OPTION_RESV GENMASK(9, 8) > #define CTRL_FETCH_START_OPTION_MASK GENMASK(9, 8) > -#define CTRL_NEG BIT(4) > +#define CTRL_NEG BIT(4) > #define CTRL_INV_PXCK BIT(3) > #define CTRL_INV_DE BIT(2) > #define CTRL_INV_VS BIT(1) > @@ -186,7 +186,7 @@ > #define INT_ENABLE_D1_PLANE_PANIC_EN BIT(0) > > #define CTRLDESCL0_1_HEIGHT(n) (((n) & 0xffff) << 16) > -#define CTRLDESCL0_1_HEIGHT_MASK GENMASK(31, 16) > +#define CTRLDESCL0_1_HEIGHT_MASK GENMASK(31, 16) > #define CTRLDESCL0_1_WIDTH(n) ((n) & 0xffff) > #define CTRLDESCL0_1_WIDTH_MASK GENMASK(15, 0) > > -- > Regards, > > Laurent Pinchart >
diff --git a/drivers/gpu/drm/mxsfb/lcdif_regs.h b/drivers/gpu/drm/mxsfb/lcdif_regs.h index 8e8bef175bf2..013f2cace2a0 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_regs.h +++ b/drivers/gpu/drm/mxsfb/lcdif_regs.h @@ -130,7 +130,7 @@ #define CTRL_FETCH_START_OPTION_BPV BIT(9) #define CTRL_FETCH_START_OPTION_RESV GENMASK(9, 8) #define CTRL_FETCH_START_OPTION_MASK GENMASK(9, 8) -#define CTRL_NEG BIT(4) +#define CTRL_NEG BIT(4) #define CTRL_INV_PXCK BIT(3) #define CTRL_INV_DE BIT(2) #define CTRL_INV_VS BIT(1) @@ -186,7 +186,7 @@ #define INT_ENABLE_D1_PLANE_PANIC_EN BIT(0) #define CTRLDESCL0_1_HEIGHT(n) (((n) & 0xffff) << 16) -#define CTRLDESCL0_1_HEIGHT_MASK GENMASK(31, 16) +#define CTRLDESCL0_1_HEIGHT_MASK GENMASK(31, 16) #define CTRLDESCL0_1_WIDTH(n) ((n) & 0xffff) #define CTRLDESCL0_1_WIDTH_MASK GENMASK(15, 0)
A couple of the register macro values are incorrectly indented. Fix them. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> --- drivers/gpu/drm/mxsfb/lcdif_regs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)