From patchwork Fri Nov 4 13:17:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13031842 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5C488C4332F for ; Fri, 4 Nov 2022 13:19:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 25ED510E793; Fri, 4 Nov 2022 13:19:23 +0000 (UTC) Received: from new1-smtp.messagingengine.com (new1-smtp.messagingengine.com [66.111.4.221]) by gabe.freedesktop.org (Postfix) with ESMTPS id CF07B10E75B for ; Fri, 4 Nov 2022 13:18:33 +0000 (UTC) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailnew.nyi.internal (Postfix) with ESMTP id 3AFE4580528; Fri, 4 Nov 2022 09:18:33 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute1.internal (MEProxy); Fri, 04 Nov 2022 09:18:33 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h=cc :cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm3; t=1667567913; x= 1667575113; bh=ltd//1Xth5WBrP6OwPj3yHhAh3ddasBVKeA7pncTY2o=; b=n 7/pCpZlVGBlVeQx9hWRN+IFie+Kpa/n5SHJS2J+nkDaQ72jtkGv9ez/N8fI5BMWR ybCSnODhjhrusKK1TLIa9tetXw/QHCpgZWctKs6wlo0UeqKIJpz2eKdpdBrS9UsD 3lra8gGQXgYSIJzlAjRUXVoUEQK+qR5P+N460W7KIXuPUerya10sKgd5nvYDGfAl rZepp5CgR+VFgPugV2WXW+qxmklWRSGNXYSIboFfvqTikSQ6dAnfMF7pWw2eSJxE p1ftRUW+W54Vs97YemWlDYBZO8wet9Q6DdlrCHtfeJiNHvgg1QEfF7lLlvYu1/sd lV6RUfkNHcQ5lWs1TWNhw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; t=1667567913; x= 1667575113; bh=ltd//1Xth5WBrP6OwPj3yHhAh3ddasBVKeA7pncTY2o=; b=e zmMgQj22P/jrfLWyWilGcuWzd5gJXrz33cEBBtR20fEqVwQrfBzVKVzpryOF8sEd /PmZeTRhOtZH4zJbNOrAeko52XyP6WE/mhi6aZ2yqysRPW3pE9JvNgWgGjguqILT qSi0gzgu+68aKqutz/XoVw3rvuZ9O1KJyaFzVELOW7Tjoqw8zGHrOQp0uVPMwgKB vl/inuwlxUUDOZ93DOycxK+aJhrZh7XV3/ooYVqdeuCfaboyaATypaVj9I05KrDs d9VKgFpoqm6gjbigj9pTgKb3GPdTA9MgBb2Ma0Xtp0lgtHQPFo+lxo8Gm2VXQVuL P6HvZRns9nVqHesRbSv8Q== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvgedrvddugdegkecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhfffugggtgffkfhgjvfevofesthekredtredtjeenucfhrhhomhepofgrgihi mhgvucftihhprghrugcuoehmrgigihhmvgestggvrhhnohdrthgvtghhqeenucggtffrrg htthgvrhhnpeduudduhfevjeetfeegvdffvdevvdejudegudekjeehtdelhfffveethfej ledtveenucevlhhushhtvghrufhiiigvpeehnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hmrgigihhmvgestggvrhhnohdrthgvtghh X-ME-Proxy: Feedback-ID: i8771445c:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 4 Nov 2022 09:18:32 -0400 (EDT) From: Maxime Ripard Date: Fri, 04 Nov 2022 14:17:38 +0100 Subject: [PATCH v2 21/65] clk: davinci: da8xx-cfgchip: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v2-21-f6736dec138e@cerno.tech> References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> To: =?unknown-8bit?q?Stephen_Boyd_=3Csboyd=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Maxime_Coquelin_=3Cmcoquelin=2Estm32=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Chen-Yu_Tsai_=3Cwens=40csie=2Eorg=3E=2C_Daniel_Vetter_=3Cd?= =?unknown-8bit?q?aniel=40ffwll=2Ech=3E=2C?= =?unknown-8bit?q?_Nicolas_Ferre_=3Cnicolas=2Eferre=40microchip=2Ecom=3E=2C?= =?unknown-8bit?q?_Thierry_Reding_=3Cthierry=2Ereding=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Jaroslav_Kysela_=3Cperex=40perex=2Ecz=3E=2C_Shawn_Guo_=3Cs?= =?unknown-8bit?q?hawnguo=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Fabio_Estevam_=3Cfestevam=40gmail=2Ecom=3E=2C_Ulf_Hansson_?= =?unknown-8bit?q?=3Culf=2Ehansson=40linaro=2Eorg=3E=2C?= =?unknown-8bit?q?_Claudiu_Beznea_=3Cclaudiu=2Ebeznea=40microchip=2Ecom=3E=2C?= =?unknown-8bit?q?_Michael_Turquette_=3Cmturquette=40baylibre=2Ecom=3E=2C?= =?unknown-8bit?q?_Dinh_Nguyen_=3Cdinguyen=40kernel=2Eorg=3E=2C_Paul_Cercueil?= =?unknown-8bit?q?_=3Cpaul=40crapouillou=2Enet=3E=2C?= =?unknown-8bit?q?_Chunyan_Zhang_=3Czhang=2Elyra=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Manivannan_Sadhasivam_=3Cmani=40kernel=2Eorg=3E=2C?= =?unknown-8bit?b?IEFuZHJlYXMgRsOkcmJlciA8YWZhZXJiZXJAc3VzZS5kZT4s?= =?unknown-8bit?q?_Jonathan_Hunter_=3Cjonathanh=40nvidia=2Ecom=3E=2C_Abel_Ves?= =?unknown-8bit?q?a_=3Cabelvesa=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Charles_Keepax_=3Cckeepax=40opensource=2Ecirrus=2Ecom=3E?= =?unknown-8bit?q?=2C?= =?unknown-8bit?q?_Alessandro_Zummo_=3Ca=2Ezummo=40towertech=2Eit=3E=2C?= =?unknown-8bit?q?_Peter_De_Schrijver_=3Cpdeschrijver=40nvidia=2Ecom=3E=2C?= =?unknown-8bit?q?_Orson_Zhai_=3Corsonzhai=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Alexandre_Torgue_=3Calexandre=2Etorgue=40foss=2Est=2Ecom?= =?unknown-8bit?q?=3E=2C?= =?unknown-8bit?q?_Prashant_Gaikwad_=3Cpgaikwad=40nvidia=2Ecom=3E=2C?= =?unknown-8bit?q?_Liam_Girdwood_=3Clgirdwood=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Alexandre_Belloni_=3Calexandre=2Ebelloni=40bootlin=2Ecom?= =?unknown-8bit?q?=3E=2C?= =?unknown-8bit?q?_Samuel_Holland_=3Csamuel=40sholland=2Eorg=3E=2C?= =?unknown-8bit?q?_Matthias_Brugger_=3Cmatthias=2Ebgg=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Richard_Fitzgerald_=3Crf=40opensource=2Ecirrus=2Ecom=3E=2C?= =?unknown-8bit?q?_Vinod_Koul_=3Cvkoul=40kernel=2Eorg=3E=2C_NXP_Linux_Team_?= =?unknown-8bit?q?=3Clinux-imx=40nxp=2Ecom=3E=2C?= =?unknown-8bit?q?_Sekhar_Nori_=3Cnsekhar=40ti=2Ecom=3E=2C_Kishon_Vijay_Abrah?= =?unknown-8bit?q?am_I_=3Ckishon=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Linus_Walleij_=3Clinus=2Ewalleij=40linaro=2Eorg=3E=2C_Taka?= =?unknown-8bit?q?shi_Iwai_=3Ctiwai=40suse=2Ecom=3E=2C?= =?unknown-8bit?q?_David_Airlie_=3Cairlied=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Luca_Ceresoli_=3Cluca=2Eceresoli=40bootlin=2Ecom=3E=2C?= =?unknown-8bit?q?_Jernej_Skrabec_=3Cjernej=2Eskrabec=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Pengutronix_Kernel_Team_=3Ckernel=40pengutronix=2Ede=3E=2C?= =?unknown-8bit?q?_Baolin_Wang_=3Cbaolin=2Ewang=40linux=2Ealibaba=2Ecom=3E=2C?= =?unknown-8bit?q?_David_Lechner_=3Cdavid=40lechnology=2Ecom=3E=2C?= =?unknown-8bit?q?_Sascha_Hauer_=3Cs=2Ehauer=40pengutronix=2Ede=3E=2C_Mark_Br?= =?unknown-8bit?q?own_=3Cbroonie=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Max_Filippov_=3Cjcmvbkbc=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Geert_Uytterhoeven_=3Cgeert+renesas=40glider=2Ebe=3E?= X-Mailer: b4 0.11.0-dev-99e3a X-Developer-Signature: v=1; a=openpgp-sha256; l=2406; i=maxime@cerno.tech; h=from:subject:message-id; bh=ntiJZSBCLXNOskq1dVAg3rLcHe7W9HnbDfbVT52VioM=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmpAp9XaDxexdTGkDvz75qOHe8S5UTNfp51znnd99Tj0t5P Fwy3dZSyMIhxMciKKbLECJsviTs163UnG988mDmsTCBDGLg4BWAicWKMDDs2rTctz5eeM7UwOpHv0v bU8q+LWd822v158WHyybWCn6Yw/NOXWP39yexZp4Kn1Z9dG+35wexAxko+oQOZba6SbPInL/ADAA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-rtc@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, patches@opensource.cirrus.com, linux-actions@lists.infradead.org, linux-mips@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org, linux-mediatek@lists.infradead.org, Maxime Ripard , linux-phy@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Davinci DA8xxx cfgchip mux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. __clk_mux_determine_rate() has the exact same behavior when CLK_SET_RATE_NO_REPARENT is set. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard Acked-by: David Lechner --- drivers/clk/davinci/da8xx-cfgchip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/davinci/da8xx-cfgchip.c b/drivers/clk/davinci/da8xx-cfgchip.c index 4103d605e804..c04276bc4051 100644 --- a/drivers/clk/davinci/da8xx-cfgchip.c +++ b/drivers/clk/davinci/da8xx-cfgchip.c @@ -229,6 +229,7 @@ static u8 da8xx_cfgchip_mux_clk_get_parent(struct clk_hw *hw) } static const struct clk_ops da8xx_cfgchip_mux_clk_ops = { + .determine_rate = __clk_mux_determine_rate, .set_parent = da8xx_cfgchip_mux_clk_set_parent, .get_parent = da8xx_cfgchip_mux_clk_get_parent, }; @@ -251,7 +252,7 @@ da8xx_cfgchip_mux_clk_register(struct device *dev, init.ops = &da8xx_cfgchip_mux_clk_ops; init.parent_names = parent_names; init.num_parents = 2; - init.flags = 0; + init.flags = CLK_SET_RATE_NO_REPARENT; mux->hw.init = &init; mux->regmap = regmap;