From patchwork Fri Oct 28 22:40:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 13024353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C423CECAAA1 for ; Fri, 28 Oct 2022 22:40:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3FC3910E8ED; Fri, 28 Oct 2022 22:40:32 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 36A1610E8EC; Fri, 28 Oct 2022 22:40:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666996827; x=1698532827; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=jCV2Nad0e2GEzOj2JWzWmI8jvuurDWwcJKrrti+nqEc=; b=WSQmfV/InB+LzlRZO/cs86ExBUZA7rS+9eiCxBJ34Dl7EhDI6AKDel4+ pPtzjvbbshdlhudbjPnKOMGQzWRO66rIIfNWYmYfvkNrYwU0r5lElsdoM 29I17dOov0mFIv+K9TVmF63ZIril9KwUs7I6NLfU5dMHuWqpm7hDIMcIH d6NA0+QNMmJgpD3q/CNpcITgeUehzoah0WEKoPyF3gIbRFxdxbQzCy4uG iIB4RKtRUlL8LucbNjCk6lWPWOaPXs6STdnKCxadZAY6T3/doTlycisOr ZuPOXysogaoACl/rGbnhlCLe5pK65vgYHJVAR2KVx2gCpg+gPaFzU/qgG g==; X-IronPort-AV: E=McAfee;i="6500,9779,10514"; a="291901274" X-IronPort-AV: E=Sophos;i="5.95,222,1661842800"; d="scan'208";a="291901274" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2022 15:40:26 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10514"; a="664184693" X-IronPort-AV: E=Sophos;i="5.95,222,1661842800"; d="scan'208";a="664184693" Received: from mdroper-desk1.fm.intel.com ([10.1.27.134]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2022 15:40:26 -0700 From: Matt Roper To: intel-gfx@lists.freedesktop.org Subject: [PATCH] drm/i915/mtl: Add missing steering table terminators Date: Fri, 28 Oct 2022 15:40:22 -0700 Message-Id: <20221028224022.964997-1-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The termination entries were missing for a couple of the recently-added MTL steering tables. Fixes: f32898c94a10 ("drm/i915/xelpg: Add multicast steering") Fixes: a7ec65fc7e83 ("drm/i915/xelpmp: Add multicast steering for media GT") Signed-off-by: Matt Roper Reviewed-by: Lucas De Marchi --- drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c index 46cf2f3d1e8e..830edffe88cc 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c @@ -128,11 +128,13 @@ static const struct intel_mmio_range xelpg_dss_steering_table[] = { { 0x00D800, 0x00D87F }, /* SLICE */ { 0x00DC00, 0x00DCFF }, /* SLICE */ { 0x00DE80, 0x00E8FF }, /* DSS (0xE000-0xE0FF reserved) */ + {}, }; static const struct intel_mmio_range xelpmp_oaddrm_steering_table[] = { { 0x393200, 0x39323F }, { 0x393400, 0x3934FF }, + {}, }; void intel_gt_mcr_init(struct intel_gt *gt)