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Mon, 12 Dec 2022 02:08:49 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT083.mail.protection.outlook.com (10.13.173.97) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5901.21 via Frontend Transport; Mon, 12 Dec 2022 02:08:49 +0000 Received: from localhost.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Sun, 11 Dec 2022 20:08:47 -0600 From: Luben Tuikov To: AMD Graphics Subject: [PATCH] drm/radeon: Fix screen corruption (v2) Date: Sun, 11 Dec 2022 21:08:21 -0500 Message-ID: <20221212020821.8248-1-luben.tuikov@amd.com> X-Mailer: git-send-email 2.39.0.rc2 In-Reply-To: <20221211114226.57398-1-luben.tuikov@amd.com> References: <20221211114226.57398-1-luben.tuikov@amd.com> MIME-Version: 1.0 X-check-string-leak: v1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT083:EE_|DM4PR12MB5938:EE_ X-MS-Office365-Filtering-Correlation-Id: c280ac75-e29f-4f13-f40d-08dadbe5cef8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Dec 2022 02:08:49.1824 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c280ac75-e29f-4f13-f40d-08dadbe5cef8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT083.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5938 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Deucher , Mikhail Krylov , Luben Tuikov , Robin Murphy , Direct Rendering Infrastructure - Development Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fix screen corruption on older 32-bit systems using AGP chips. On older systems with little memory, for instance 1.5 GiB, using an AGP chip, the device's DMA mask is 0xFFFFFFFF, but the memory mask is 0x7FFFFFF, and subsequently dma_addressing_limited() returns 0xFFFFFFFF < 0x7FFFFFFF, false. As such the result of this static inline isn't suitable for the last argument to ttm_device_init()--it simply needs to now whether to use GFP_DMA32 when allocating DMA buffers. Partially reverts commit 33b3ad3788aba846fc8b9a065fe2685a0b64f713. v2: Amend the commit description. Cc: Mikhail Krylov Cc: Alex Deucher Cc: Robin Murphy Cc: Direct Rendering Infrastructure - Development Cc: AMD Graphics Fixes: 33b3ad3788aba8 ("drm/radeon: handle PCIe root ports with addressing limitations") Signed-off-by: Luben Tuikov --- drivers/gpu/drm/radeon/radeon.h | 1 + drivers/gpu/drm/radeon/radeon_device.c | 2 +- drivers/gpu/drm/radeon/radeon_ttm.c | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) base-commit: 20e03e7f6e8efd42168db6d3fe044b804e0ede8f diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 37dec92339b16a..4fe38fd9be3267 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -2426,6 +2426,7 @@ struct radeon_device { struct radeon_wb wb; struct radeon_dummy_page dummy_page; bool shutdown; + bool need_dma32; bool need_swiotlb; bool accel_working; bool fastfb_working; /* IGP feature*/ diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 6344454a772172..3643a3cfe061bd 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1370,7 +1370,7 @@ int radeon_device_init(struct radeon_device *rdev, if (rdev->family == CHIP_CEDAR) dma_bits = 32; #endif - + rdev->need_dma32 = dma_bits == 32; r = dma_set_mask_and_coherent(&rdev->pdev->dev, DMA_BIT_MASK(dma_bits)); if (r) { pr_warn("radeon: No suitable DMA available\n"); diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index bdb4c0e0736ba2..3debaeb720d173 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -696,7 +696,7 @@ int radeon_ttm_init(struct radeon_device *rdev) rdev->ddev->anon_inode->i_mapping, rdev->ddev->vma_offset_manager, rdev->need_swiotlb, - dma_addressing_limited(&rdev->pdev->dev)); + rdev->need_dma32); if (r) { DRM_ERROR("failed initializing buffer object driver(%d).\n", r); return r;