diff mbox series

drm/i915/selftests: Remove hardcoded value with a macro

Message ID 20221213120010.5857-1-nirmoy.das@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/selftests: Remove hardcoded value with a macro | expand

Commit Message

Nirmoy Das Dec. 13, 2022, noon UTC 
Use MI_USE_GGTT instead of hardcoded value.

Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Matthew Auld Dec. 13, 2022, 1:04 p.m. UTC | #1 
On 13/12/2022 12:00, Nirmoy Das wrote:
> Use MI_USE_GGTT instead of hardcoded value.
> 
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Andrzej Hajda Dec. 13, 2022, 2:14 p.m. UTC | #2 
On 13.12.2022 13:00, Nirmoy Das wrote:
> Use MI_USE_GGTT instead of hardcoded value.
>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
>   drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> index c228fe4aba50..3bef1beec7cb 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
> @@ -222,7 +222,7 @@ static int gpu_set(struct context *ctx, unsigned long offset, u32 v)
>   	}
>   
>   	if (GRAPHICS_VER(ctx->engine->i915) >= 8) {
> -		*cs++ = MI_STORE_DWORD_IMM_GEN4 | 1 << 22;
> +		*cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;

Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>

Regards
Andrzej

>   		*cs++ = lower_32_bits(i915_ggtt_offset(vma) + offset);
>   		*cs++ = upper_32_bits(i915_ggtt_offset(vma) + offset);
>   		*cs++ = v;
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
index c228fe4aba50..3bef1beec7cb 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
@@ -222,7 +222,7 @@  static int gpu_set(struct context *ctx, unsigned long offset, u32 v)
 	}
 
 	if (GRAPHICS_VER(ctx->engine->i915) >= 8) {
-		*cs++ = MI_STORE_DWORD_IMM_GEN4 | 1 << 22;
+		*cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
 		*cs++ = lower_32_bits(i915_ggtt_offset(vma) + offset);
 		*cs++ = upper_32_bits(i915_ggtt_offset(vma) + offset);
 		*cs++ = v;