From patchwork Wed Dec 14 12:58:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 13073067 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7D0D8C4332F for ; Wed, 14 Dec 2022 12:59:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 391C310E3E1; Wed, 14 Dec 2022 12:59:39 +0000 (UTC) Received: from aposti.net (aposti.net [89.234.176.197]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5350A10E3DC for ; Wed, 14 Dec 2022 12:59:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1671022718; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IjEqO4+e5a85zoFujWIdC4NDhCTvt3vZK7qMG1zFzpw=; b=cQ7sM/duB1Ux5RyiSMSRezimCjOFlDjgcHqu/LkB5qaauPqMY+kcSY77YiRqS0AG8ETxcA BjsEBiB4N5UcW9AWZxSlL2MPpBh9Z6sR6et5U2F5j/ynZ3lJZejoAvRXj3YFfb/5JxHaaJ g2cNzoksDdMX6uTjGK3w5RApjGizKd8= From: Paul Cercueil To: Phong LE , Neil Armstrong , Andrzej Hajda , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski Subject: [PATCH 05/10] drm: bridge: it66121: Fix wait for DDC ready Date: Wed, 14 Dec 2022 13:58:16 +0100 Message-Id: <20221214125821.12489-6-paul@crapouillou.net> In-Reply-To: <20221214125821.12489-1-paul@crapouillou.net> References: <20221214125821.12489-1-paul@crapouillou.net> MIME-Version: 1.0 X-Spam: Yes X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Cercueil , devicetree@vger.kernel.org, list@opendingux.net, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The function it66121_wait_ddc_ready() would previously read the status register until "true", which means it never actually polled anything and would just read the register once. Now, it will properly wait until the DDC hardware is ready or until it reported an error. The 'busy' variable was also renamed to 'error' since these bits are set on error and not when the DDC hardware is busy. Since the DDC ready function is now working properly, the msleep(20) can be removed. Signed-off-by: Paul Cercueil Reviewed-by: Robert Foss --- drivers/gpu/drm/bridge/ite-it66121.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/bridge/ite-it66121.c b/drivers/gpu/drm/bridge/ite-it66121.c index 0a4fdfd7af44..bfb9c87a7019 100644 --- a/drivers/gpu/drm/bridge/ite-it66121.c +++ b/drivers/gpu/drm/bridge/ite-it66121.c @@ -440,15 +440,17 @@ static int it66121_configure_afe(struct it66121_ctx *ctx, static inline int it66121_wait_ddc_ready(struct it66121_ctx *ctx) { int ret, val; - u32 busy = IT66121_DDC_STATUS_NOACK | IT66121_DDC_STATUS_WAIT_BUS | - IT66121_DDC_STATUS_ARBI_LOSE; + u32 error = IT66121_DDC_STATUS_NOACK | IT66121_DDC_STATUS_WAIT_BUS | + IT66121_DDC_STATUS_ARBI_LOSE; + u32 done = IT66121_DDC_STATUS_TX_DONE; - ret = regmap_read_poll_timeout(ctx->regmap, IT66121_DDC_STATUS_REG, val, true, - IT66121_EDID_SLEEP_US, IT66121_EDID_TIMEOUT_US); + ret = regmap_read_poll_timeout(ctx->regmap, IT66121_DDC_STATUS_REG, val, + val & (error | done), IT66121_EDID_SLEEP_US, + IT66121_EDID_TIMEOUT_US); if (ret) return ret; - if (val & busy) + if (val & error) return -EAGAIN; return 0; @@ -582,9 +584,6 @@ static int it66121_get_edid_block(void *context, u8 *buf, offset += cnt; remain -= cnt; - /* Per programming manual, sleep here before emptying the FIFO */ - msleep(20); - ret = it66121_wait_ddc_ready(ctx); if (ret) return ret;