diff mbox series

[v2,1/4] dt-bindings: display: imx: add binding for i.MX8MP HDMI TX

Message ID 20221216210742.3233382-1-l.stach@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series [v2,1/4] dt-bindings: display: imx: add binding for i.MX8MP HDMI TX | expand

Commit Message

Lucas Stach Dec. 16, 2022, 9:07 p.m. UTC 
The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
core with a little bit of SoC integration around it.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 .../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 69 +++++++++++++++++++
 1 file changed, 69 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml

Comments

Liu Ying Dec. 17, 2022, 7:40 a.m. UTC | #1 
Hi Lucas,

On Fri, 2022-12-16 at 22:07 +0100, Lucas Stach wrote:
> The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
> core with a little bit of SoC integration around it.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>  .../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 69
> +++++++++++++++++++
>  1 file changed, 69 insertions(+)
>  create mode 100644
> Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
> 
> diff --git
> a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
> b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
> new file mode 100644
> index 000000000000..75ebeaa8c9d5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-
> hdmi.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi.yaml#

Better to put the binding documentation under the display/bridge
umbrella as the corresponding linux driver is a DRM bridge driver, not
a DRM encoder driver.

Regarding the file name, I would use 'fsl,imx8mp-hdmi-tx.yaml' to
explicitly tell it's a TX controller(not a RX controller), which
matches the chapter name 'HDMI TX controller' in i.MX8mp RM.

> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8MP DWC HDMI TX Encoder
> +
> +maintainers:
> +  - Lucas Stach <l.stach@pengutronix.de>
> +
> +description: |
> +  The i.MX8MP HDMI transmitter is a Synopsys DesignWare
> +  HDMI 2.0 TX controller IP.

i.MX8mp RM says it is compatible with the HDMI v2.0a spec, so better to
mention 2.0a instead of 2.0.

> +
> +allOf:
> +  - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> +
> +properties:
> +  compatible:
> +    enum:
> +      - fsl,imx8mp-hdmi

Like the file name, I would use 'fsl,imx8mp-hdmi-tx'.

It seems that the i.MX6q DW HDMI TX controller will not easily use this
binding since it's corresponding driver is a DRM encoder driver, and no
other i.MX SoCs embed the controller, so use const instead of enum(It
can be changed to enum when necessary later.)?
 
> +
> +  reg-io-width:
> +    const: 1
> +
> +  clocks:
> +    maxItems: 5
> +
> +  clock-names:
> +    items:
> +      - const: iahb
> +      - const: isfr
> +      - const: fdcc
> +      - const: cec
> +      - const: pix
> +
> +  power-domains:
> +    maxItems: 1

Missing 'ports' property?

> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - interrupts
> +  - power-domains
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>

Sort the header files alphabetically.

I'm cc'ing Sandor to be aware of the patch set.

Regards,
Liu Ying

> +    #include <dt-bindings/clock/imx8mp-clock.h>
> +    #include <dt-bindings/power/imx8mp-power.h>
> +
> +    hdmi@32fd8000 {
> +        compatible = "fsl,imx8mp-hdmi";
> +        reg = <0x32fd8000 0x7eff>;
> +        interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +        clocks = <&clk IMX8MP_CLK_HDMI_APB>,
> +                 <&clk IMX8MP_CLK_HDMI_REF_266M>,
> +                 <&clk IMX8MP_CLK_HDMI_FDCC_TST>,
> +                 <&clk IMX8MP_CLK_32K>,
> +                 <&hdmi_tx_phy>;
> +        clock-names = "iahb", "isfr", "fdcc", "cec", "pix";
> +        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>;
> +        reg-io-width = <1>;
> +    };
Rob Herring Dec. 20, 2022, 6:28 p.m. UTC | #2 
On Fri, Dec 16, 2022 at 10:07:39PM +0100, Lucas Stach wrote:
> The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
> core with a little bit of SoC integration around it.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>  .../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 69 +++++++++++++++++++
>  1 file changed, 69 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
> new file mode 100644
> index 000000000000..75ebeaa8c9d5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8MP DWC HDMI TX Encoder
> +
> +maintainers:
> +  - Lucas Stach <l.stach@pengutronix.de>
> +
> +description: |

Don't need '|'.

> +  The i.MX8MP HDMI transmitter is a Synopsys DesignWare
> +  HDMI 2.0 TX controller IP.
> +
> +allOf:
> +  - $ref: ../bridge/synopsys,dw-hdmi.yaml#

/schemas/display/bridge/...

> +
> +properties:
> +  compatible:
> +    enum:
> +      - fsl,imx8mp-hdmi
> +
> +  reg-io-width:
> +    const: 1
> +
> +  clocks:
> +    maxItems: 5
> +
> +  clock-names:
> +    items:
> +      - const: iahb
> +      - const: isfr
> +      - const: fdcc
> +      - const: cec
> +      - const: pix
> +
> +  power-domains:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - interrupts
> +  - power-domains
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/clock/imx8mp-clock.h>
> +    #include <dt-bindings/power/imx8mp-power.h>
> +
> +    hdmi@32fd8000 {
> +        compatible = "fsl,imx8mp-hdmi";
> +        reg = <0x32fd8000 0x7eff>;
> +        interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +        clocks = <&clk IMX8MP_CLK_HDMI_APB>,
> +                 <&clk IMX8MP_CLK_HDMI_REF_266M>,
> +                 <&clk IMX8MP_CLK_HDMI_FDCC_TST>,
> +                 <&clk IMX8MP_CLK_32K>,
> +                 <&hdmi_tx_phy>;
> +        clock-names = "iahb", "isfr", "fdcc", "cec", "pix";
> +        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>;
> +        reg-io-width = <1>;


ports? This block isn't connected to anything? Like an 'hdmi-connector'?

Rob
Rob Herring Dec. 20, 2022, 6:37 p.m. UTC | #3 
On Sat, Dec 17, 2022 at 03:40:24PM +0800, Liu Ying wrote:
> Hi Lucas,
> 
> On Fri, 2022-12-16 at 22:07 +0100, Lucas Stach wrote:
> > The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
> > core with a little bit of SoC integration around it.
> > 
> > Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> > ---
> >  .../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 69
> > +++++++++++++++++++
> >  1 file changed, 69 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
> > b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
> > new file mode 100644
> > index 000000000000..75ebeaa8c9d5
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-
> > hdmi.yaml
> > @@ -0,0 +1,69 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi.yaml#
> 
> Better to put the binding documentation under the display/bridge
> umbrella as the corresponding linux driver is a DRM bridge driver, not
> a DRM encoder driver.

Bridge vs. encoder is not a distinction I would make for bindings. It 
would be better if all the HDMI encoders/bridges were grouped together 
rather than in vendor silos/directories. But that's a much bigger 
restructuring and fsl,imx6-hdmi.yaml is already here.

> 
> Regarding the file name, I would use 'fsl,imx8mp-hdmi-tx.yaml' to
> explicitly tell it's a TX controller(not a RX controller), which
> matches the chapter name 'HDMI TX controller' in i.MX8mp RM.
> 
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Freescale i.MX8MP DWC HDMI TX Encoder
> > +
> > +maintainers:
> > +  - Lucas Stach <l.stach@pengutronix.de>
> > +
> > +description: |
> > +  The i.MX8MP HDMI transmitter is a Synopsys DesignWare
> > +  HDMI 2.0 TX controller IP.
> 
> i.MX8mp RM says it is compatible with the HDMI v2.0a spec, so better to
> mention 2.0a instead of 2.0.
> 
> > +
> > +allOf:
> > +  - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - fsl,imx8mp-hdmi
> 
> Like the file name, I would use 'fsl,imx8mp-hdmi-tx'.
> 
> It seems that the i.MX6q DW HDMI TX controller will not easily use this
> binding since it's corresponding driver is a DRM encoder driver, and no
> other i.MX SoCs embed the controller, so use const instead of enum(It
> can be changed to enum when necessary later.)?

That shouldn't matter for bindings. I do expect the 'ports' will be a 
bit different, so probably not worth trying to combine the schema.

Rob
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
new file mode 100644
index 000000000000..75ebeaa8c9d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml
@@ -0,0 +1,69 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8MP DWC HDMI TX Encoder
+
+maintainers:
+  - Lucas Stach <l.stach@pengutronix.de>
+
+description: |
+  The i.MX8MP HDMI transmitter is a Synopsys DesignWare
+  HDMI 2.0 TX controller IP.
+
+allOf:
+  - $ref: ../bridge/synopsys,dw-hdmi.yaml#
+
+properties:
+  compatible:
+    enum:
+      - fsl,imx8mp-hdmi
+
+  reg-io-width:
+    const: 1
+
+  clocks:
+    maxItems: 5
+
+  clock-names:
+    items:
+      - const: iahb
+      - const: isfr
+      - const: fdcc
+      - const: cec
+      - const: pix
+
+  power-domains:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - interrupts
+  - power-domains
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/clock/imx8mp-clock.h>
+    #include <dt-bindings/power/imx8mp-power.h>
+
+    hdmi@32fd8000 {
+        compatible = "fsl,imx8mp-hdmi";
+        reg = <0x32fd8000 0x7eff>;
+        interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk IMX8MP_CLK_HDMI_APB>,
+                 <&clk IMX8MP_CLK_HDMI_REF_266M>,
+                 <&clk IMX8MP_CLK_HDMI_FDCC_TST>,
+                 <&clk IMX8MP_CLK_32K>,
+                 <&hdmi_tx_phy>;
+        clock-names = "iahb", "isfr", "fdcc", "cec", "pix";
+        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>;
+        reg-io-width = <1>;
+    };