| Message ID | 20221221231943.1961117-6-marijn.suijten@somainline.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/msm: DSC Electric Boogaloo for sm8[12]50 | expand |
On 22/12/2022 01:19, Marijn Suijten wrote: > Resource allocation of DSC blocks should behave more like LMs and CTLs > where NULL resources (based on initial hw_blk creation via definitions > in the catalog) are skipped ^1. The current hardcoded mapping of DSC > blocks however means that resource allocation shouldn't succeed at all > when the DSC block on the corresponding index doesn't exist, rather than > searching for the next free block. > > This hardcoded mapping should be loosened separately as DPU 5.0.0 > introduced a crossbar where DSC blocks can be "somewhat" freely bound to > any PP and CTL (in proper pairs). > > ^1: which, on hardware that supports DSC, can happen after a git rebase > ended up moving additions to _dpu_cfg to a different struct which has > the same patch context. > > Fixes: f2803ee91a41 ("drm/msm/disp/dpu1: Add DSC support in RM") > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 5 +++++ > 1 file changed, 5 insertions(+) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 8471d04bff50..dcbf03d2940a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -496,6 +496,11 @@ static int _dpu_rm_reserve_dsc(struct dpu_rm *rm, /* check if DSC required are allocated or not */ for (i = 0; i < num_dsc; i++) { + if (!rm->dsc_blks[i]) { + DPU_ERROR("DSC %d does not exist\n", i); + return -EIO; + } + if (global_state->dsc_to_enc_id[i]) { DPU_ERROR("DSC %d is already allocated\n", i); return -EIO;
Resource allocation of DSC blocks should behave more like LMs and CTLs where NULL resources (based on initial hw_blk creation via definitions in the catalog) are skipped ^1. The current hardcoded mapping of DSC blocks however means that resource allocation shouldn't succeed at all when the DSC block on the corresponding index doesn't exist, rather than searching for the next free block. This hardcoded mapping should be loosened separately as DPU 5.0.0 introduced a crossbar where DSC blocks can be "somewhat" freely bound to any PP and CTL (in proper pairs). ^1: which, on hardware that supports DSC, can happen after a git rebase ended up moving additions to _dpu_cfg to a different struct which has the same patch context. Fixes: f2803ee91a41 ("drm/msm/disp/dpu1: Add DSC support in RM") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 5 +++++ 1 file changed, 5 insertions(+)