From patchwork Mon Jan 23 12:23:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13112051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BEE1FC38142 for ; Mon, 23 Jan 2023 12:24:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0A43610E364; Mon, 23 Jan 2023 12:24:52 +0000 (UTC) Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by gabe.freedesktop.org (Postfix) with ESMTPS id 803B510E364 for ; Mon, 23 Jan 2023 12:24:49 +0000 (UTC) Received: by mail-pl1-x634.google.com with SMTP id d3so11183646plr.10 for ; Mon, 23 Jan 2023 04:24:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cD1qAiqhfd1q1+yXxcnzmuelB54aAtoGJRwcpOhnRjA=; b=nLSc4UWw+qc1isoMm0ddsf/DocNuZCqOiwSZSeo7M6fe0Z2d0dEa9yd9SQd/XAXEB0 64OifFsLSwXNN/ayv3jHG9LlNRtUIpSKUiHW5+YxKB/g3Hli7doXBgla0tYeZvpk023n p4xF3PaRlAhf+Fz1cQAjxwz4WJEHyHrlkHukg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cD1qAiqhfd1q1+yXxcnzmuelB54aAtoGJRwcpOhnRjA=; b=2O0ksRrtGV5Z5XZJCZuHPHAVitE2sSAPuApdVFmRFyakxyOxLI9CLfSyx576pY5W9+ JZ+lfS6rIqPkAsXttSckZTCmFAMV/gGOokg5VzL+hnPWv10A/vIJhOFbcEC42MZu291B DRXWmoixdXytOMg1KXgWSmmaEQVTrKvrLbd+sw6HnVui9JTMvcflhzK0LaCso51lqzb7 vF0IzDrz0JyX5My4VdtmPM6/8hORoIUXFC/y0tDxAdGSRGAaBHTO3Saq/r8GMx+eIEfI LCIveRYrCWa/IQyDaq4AEQKsC4wQR289KX8TVuQLk2JJLZHixJqbAMZFzNO6PoxAD7Rm /mTg== X-Gm-Message-State: AFqh2krJ+EwZAGQopCPpvf2F0oIIp+20PPeizCRAItgaIQFUsJAtxnRG M5eLdLbnzfmZ2Duxk+kUzduLiA== X-Google-Smtp-Source: AMrXdXtNlBtGm2HMa4XqvSMnPI0UH7tFFtjGyzBge5hxMTcIHFDptTvIQNW0A4bsqByn90MzxpLTWw== X-Received: by 2002:a17:902:e5d2:b0:191:3808:14b0 with SMTP id u18-20020a170902e5d200b00191380814b0mr33659343plf.4.1674476689065; Mon, 23 Jan 2023 04:24:49 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a15f:2279:f361:f93b:7971]) by smtp.gmail.com with ESMTPSA id w10-20020a170902e88a00b001960806728asm1291811plg.88.2023.01.23.04.24.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 04:24:48 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Subject: [PATCH v11 10/18] drm: exynos: dsi: Add input_bus_flags Date: Mon, 23 Jan 2023 17:53:11 +0530 Message-Id: <20230123122319.261341-11-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230123122319.261341-1-jagan@amarulasolutions.com> References: <20230123122319.261341-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting the i.MX8M Mini/Nano DSI host to add additional Data Enable signal active low (DE_LOW). This makes the valid data transfer on each horizontal line. So, add additional bus flags DE_LOW setting via input_bus_flags for i.MX8M Mini/Nano platforms. Reviewed-by: Frieder Schrempf Suggested-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v11: - collect RB from Frieder Changes for v10, v9: - none Changes for v8: - add DE_LOW for i.MX8M Mini/Nano platforms. Changes for v7, v6: - none Changes for v5: - rebased based on updated bridge changes Changes for v4 - v1: - none drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index d8958838ab7b..5518d92c8455 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1691,6 +1691,10 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static const struct drm_bridge_timings dsim_bridge_timings_de_low = { + .input_bus_flags = DRM_BUS_FLAG_DE_LOW, +}; + static int exynos_dsi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1777,6 +1781,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; dsi->bridge.pre_enable_prev_first = true; + /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) + dsi->bridge.timings = &dsim_bridge_timings_de_low; + ret = component_add(dev, &exynos_dsi_component_ops); if (ret) goto err_disable_runtime;