From patchwork Thu Jan 26 14:44:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13117290 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0D3F3C54E94 for ; Thu, 26 Jan 2023 14:46:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1C54710E925; Thu, 26 Jan 2023 14:46:48 +0000 (UTC) Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7439210E922 for ; Thu, 26 Jan 2023 14:46:45 +0000 (UTC) Received: by mail-pl1-x62e.google.com with SMTP id a18so2027339plm.2 for ; Thu, 26 Jan 2023 06:46:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CCVYG25W1pHQNxSfAOiHmaNQidizxzXKd6AiL4XAwms=; b=J5r6PKryB1ljLmvqcvclVHC92p0hV+3a4T0wmynl5mHdjZSWBaxln6B+q2Q+RNzYmc uHsB87C/M9RCMhUC5jRCjRXQE6QFfrjK+1qEpuMXkJbZqgbgE85Rlr0YBNUdI9hRilyz vhIEGJ0oWoB9vqhtmRgisKViEnW8Ql14VL9nM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CCVYG25W1pHQNxSfAOiHmaNQidizxzXKd6AiL4XAwms=; b=5AeTd8jrZJhGA1TkpL5sPj1E/xiCIJ1BHn3nE1S247QwGW9BjnEl9XN4liYGHyGnOK wztHvqGWeVYiSj1dSmZF/3pt0XZAva69pDIwGzhJar6IvlC2ka8FInvX1HVTqjjEo8n0 ToLrzbph+1dxe7LfEDcy/Hxq6A8KjsojrtSw1E18gfD7rzBb5hTxFKHmQ73aGA8MdPar vBc5t5eJhzCD3B1asSbWbfuTzQvA57JHV0bWlMol/DusN0vPn4g5auXwSQy81asg0X21 fT4lk5dsfkw0POngIoMOw5dBg6MzCP4to8HdOH0DTKRtwUtANPMKwKm+EFqW1GusP1ap YctQ== X-Gm-Message-State: AFqh2kokgDWIHhc2/itvW+GiPAFtBnKcfYbqD5sA0ujhAtsVZEVqSGvR BGFUgbyUSODvLPYwoST692+gmg== X-Google-Smtp-Source: AMrXdXtJ5fZLKtk38j0oZHe+QIkIVQDfMF/e1R47vrpGkb7LfA21PmqqZvKVYx0jfa7t4ZjIOLqVfQ== X-Received: by 2002:a05:6a20:3942:b0:b8:50fd:fd1a with SMTP id r2-20020a056a20394200b000b850fdfd1amr50376881pzg.19.1674744405018; Thu, 26 Jan 2023 06:46:45 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a238:3cb1:2156:ef87:8af5]) by smtp.gmail.com with ESMTPSA id d197-20020a6336ce000000b0042988a04bfdsm823660pga.9.2023.01.26.06.46.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Jan 2023 06:46:44 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Robert Foss , Laurent Pinchart , Marek Vasut Subject: [PATCH v12 10/18] drm: exynos: dsi: Add input_bus_flags Date: Thu, 26 Jan 2023 20:14:19 +0530 Message-Id: <20230126144427.607098-11-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230126144427.607098-1-jagan@amarulasolutions.com> References: <20230126144427.607098-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , dri-devel@lists.freedesktop.org, NXP Linux Team , linux-amarula , linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting the i.MX8M Mini/Nano DSI host to add additional Data Enable signal active low (DE_LOW). This makes the valid data transfer on each horizontal line. So, add additional bus flags DE_LOW setting via input_bus_flags for i.MX8M Mini/Nano platforms. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Suggested-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder Changes for v10, v9: - none Changes for v8: - add DE_LOW for i.MX8M Mini/Nano platforms. Changes for v7, v6: - none Changes for v5: - rebased based on updated bridge changes Changes for v4 - v1: - none drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index d8958838ab7b..5518d92c8455 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1691,6 +1691,10 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static const struct drm_bridge_timings dsim_bridge_timings_de_low = { + .input_bus_flags = DRM_BUS_FLAG_DE_LOW, +}; + static int exynos_dsi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1777,6 +1781,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; dsi->bridge.pre_enable_prev_first = true; + /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) + dsi->bridge.timings = &dsim_bridge_timings_de_low; + ret = component_add(dev, &exynos_dsi_component_ops); if (ret) goto err_disable_runtime;