From patchwork Fri Mar 17 09:12:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13178786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C4A7C76195 for ; Fri, 17 Mar 2023 09:12:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A761E10EE8F; Fri, 17 Mar 2023 09:12:56 +0000 (UTC) Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by gabe.freedesktop.org (Postfix) with ESMTPS id 37C8810EEA8 for ; Fri, 17 Mar 2023 09:12:53 +0000 (UTC) Received: by mail-wr1-x431.google.com with SMTP id o7so3773322wrg.5 for ; Fri, 17 Mar 2023 02:12:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679044371; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4UjNj4RhdG2GPeYaYxWsIzZJ/IFtQynTcD2qm6NR1vE=; b=xy+FuwJCeV5BHM1ESuzqwpYWvvMVZEdez2f3yyqE3fWbJbpePOV9ZfBthzOUDR6LYE zXflTOmzBke/sSkP/PDPEKmICPTQCuyXEWFKgDCTSyNRD9T8dsBk47T/TmZ+zQhMi5ED O2a2EdLv+auQ/u0v+cL9wbIanrCm6/X5xQUnNFCfTyLRYKFtWwgXrip+OuGfWgeIClQy vEkdnFQh/OZgYDIQp0iJMk7I3qoQapHN5PjmYt66wsKYESvJroOc/PsMNVrYk+daA6Q+ W5ed8E6uHwXDkG8FmJRJabSv0omd+P6gpC4oURFfJRgC+HaFIpbagadRsytxDCuR5zwH 24XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679044371; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4UjNj4RhdG2GPeYaYxWsIzZJ/IFtQynTcD2qm6NR1vE=; b=jcwubUoNrzB3po/61/P7u07QdVxy82DHTRUqDltc+xDAsPOZev5b/QiFj4cnVM5tl8 BIIEd/fI/dFw4mujcWZyGQ8qGwCOyPRZdnSl5eS1bCPBu1o5ovwGcvr1S3JikcX0S8jj 0+89FvmjnnmRDuNzslLwl0GW6zOMnNJPyzYAbXI9O53PcC0rEqzfAHwmLseMmOJCfUWj lY58Rn/6FTVPTdW5OluksZyrVnOEfiTXSxD5kSha6XWu3VMo8FzcO4H4nDc9v//UR08F ctiB49y8xb2fNi03Dt7zOa/pFa6iTV3pikxCUWy/QOmRuru+poja6GCuWYuxmFpQsP2b cQQQ== X-Gm-Message-State: AO0yUKUUJRov5UetNPJoCq+4JQ2IrqGWxksGTe5VHJyNjVglylp5Hsdj MQxv3RN2ruwAjlpX/kzyNoH17Q== X-Google-Smtp-Source: AK7set9mi8MQZ/HqkT5nZZPAwfUaxgg9wEu0MBnMQvMWWmoByizcvy2jNRmaM+u4WznDM6qsJ5go5A== X-Received: by 2002:a05:6000:186:b0:2c7:dad:5630 with SMTP id p6-20020a056000018600b002c70dad5630mr6085388wrx.27.1679044371551; Fri, 17 Mar 2023 02:12:51 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id j10-20020a5d464a000000b002cea8f07813sm1467976wrs.81.2023.03.17.02.12.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 02:12:51 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 10:12:48 +0100 Subject: [PATCH v5 2/5] arm64: dts: qcom: sm8350: switch to combo usb3/dp phy MIME-Version: 1.0 Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v5-2-a27f1b26ebe8@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v5-0-a27f1b26ebe8@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v5-0-a27f1b26ebe8@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.1 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The first QMP PHY is an USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov #SM8350-HDK Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 42 +++++++++++++----------------------- 1 file changed, 15 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 1afc4311796e..975ab4cbe57e 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -661,7 +662,7 @@ gcc: clock-controller@100000 { <&ufs_mem_phy_lanes 0>, <&ufs_mem_phy_lanes 1>, <&ufs_mem_phy_lanes 2>, - <0>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, <0>; }; @@ -2135,37 +2136,24 @@ usb_2_hsphy: phy@88e4000 { resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; }; - usb_1_qmpphy: phy-wrapper@88e9000 { - compatible = "qcom,sm8350-qmp-usb3-phy"; - reg = <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x20>; - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_1_qmpphy: phy@88e9000 { + compatible = "qcom,sm8350-qmp-usb3-dp-phy"; + reg = <0 0x088e8000 0 0x3000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "phy", "common"; - usb_1_ssphy: phy@88e9200 { - reg = <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_phy_pipe_clk_src"; - }; + #clock-cells = <1>; + #phy-cells = <1>; + + status = "disabled"; }; usb_2_qmpphy: phy-wrapper@88eb000 { @@ -2268,7 +2256,7 @@ usb_1_dwc3: usb@a600000 { iommus = <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; }; @@ -2633,8 +2621,8 @@ dispcc: clock-controller@af00000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>, <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>, - <0>, - <0>; + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; clock-names = "bi_tcxo", "dsi0_phy_pll_out_byteclk", "dsi0_phy_pll_out_dsiclk",