From patchwork Fri Mar 17 09:12:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13178788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D96FAC76195 for ; Fri, 17 Mar 2023 09:13:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 00F3410EEAA; Fri, 17 Mar 2023 09:12:58 +0000 (UTC) Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by gabe.freedesktop.org (Postfix) with ESMTPS id 49C5F10EEAA for ; Fri, 17 Mar 2023 09:12:55 +0000 (UTC) Received: by mail-wr1-x42a.google.com with SMTP id j2so3765498wrh.9 for ; Fri, 17 Mar 2023 02:12:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679044374; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GZIs3r73pgtpcK0YdCZ3Ri1mi1f0OffOfBOdtovynl8=; b=nSghV9Cc8Q/DC16MdI2Wtprf7UPERnn9OF68wgS912+UZt2ghc/VtITiU4NfRjGZDZ jqCvkffJ4TkOkg1daBx3XYgdAWUJc6xYa/ILiDMf6UmGmoX0707Qg+QCi8vpOPAis2Mj W/uYgQcwoPMIdx8dlbjTghgSjcHXg1CDvRMKoCZIAuSWxWGzflRlq7dbAcoeloIz8APd y/tBAzBFBHwmb8tLtLmAGeeBgeWKNtIQsVCUrf4geL7igQoM6or51199pXZGurzV7FD5 QIeumQc3HGx7l5NzUoANEMaBgB+ZERW2uWIwLFCYj467JQYp+PrAWH+SOwQICm5CVBAY 4JpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679044374; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GZIs3r73pgtpcK0YdCZ3Ri1mi1f0OffOfBOdtovynl8=; b=8MzYgemUTI+vuEaA/itTVZWk2yMWa9SIkqOR8dPVqn3bmo3nAYtmSBsfAYCz6JDKAR oix7bV+7LVBtE43qDWBxqbLnzYcrkWVLt4RF31koD/qT5CpbnTxH7kH0qauWVC6OBvD8 0OHhGzkfVfGxohxkvZMxIuDoqrjetWD/kDdcK0/P0QYxRnuiqDhA+32mDvaYrMuo/Z1o DsTkXA3ADVDezvS+xjw44YuDrojcwtShA7mKdVPMfhTUbReZQ8QZ/mQ3H7Hau6s2FJPU JNrxB6kZngivmSoX47WmMurCCnFv7xZEPF+bzMFEkTQYKqC5LmR8TajcTowW1CUZBLDX lwsg== X-Gm-Message-State: AO0yUKUYFJhZcl2+CP5ilVcgWqQvAxVhwYYNO5I9tgEfsnwde0A/9aoP Kzz7b7yW1kNvg7YWmqpxu80GYQ== X-Google-Smtp-Source: AK7set8P6yV8peCVDsMS3+udTSPW2sBNiQJFkVz+v/l1PTissAYH1q2iVTyLAwttRlkHhWhjXq/xHQ== X-Received: by 2002:a5d:62cb:0:b0:2cf:e3c9:bdc with SMTP id o11-20020a5d62cb000000b002cfe3c90bdcmr6244506wrv.60.1679044373687; Fri, 17 Mar 2023 02:12:53 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id j10-20020a5d464a000000b002cea8f07813sm1467976wrs.81.2023.03.17.02.12.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 02:12:53 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 10:12:50 +0100 Subject: [PATCH v5 4/5] arm64: dts: qcom: sm8450: switch to usb3/dp combo phy MIME-Version: 1.0 Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v5-4-a27f1b26ebe8@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v5-0-a27f1b26ebe8@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v5-0-a27f1b26ebe8@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.1 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The QMP PHY is a USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 42 +++++++++++++----------------------- 1 file changed, 15 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 69695eb83897..0b5a151ce138 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -748,7 +749,7 @@ gcc: clock-controller@100000 { <&ufs_mem_phy_lanes 0>, <&ufs_mem_phy_lanes 1>, <&ufs_mem_phy_lanes 2>, - <0>; + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>; clock-names = "bi_tcxo", "sleep_clk", "pcie_0_pipe_clk", @@ -2034,37 +2035,24 @@ usb_1_hsphy: phy@88e3000 { resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; }; - usb_1_qmpphy: phy-wrapper@88e9000 { - compatible = "qcom,sm8450-qmp-usb3-phy"; - reg = <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x20>; - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_1_qmpphy: phy@88e8000 { + compatible = "qcom,sm8450-qmp-usb3-dp-phy"; + reg = <0 0x088e8000 0 0x4000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "phy", "common"; - usb_1_ssphy: phy@88e9200 { - reg = <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_phy_pipe_clk_src"; - }; + #clock-cells = <1>; + #phy-cells = <1>; + + status = "disabled"; }; remoteproc_slpi: remoteproc@2400000 { @@ -2972,8 +2960,8 @@ dispcc: clock-controller@af00000 { <&mdss_dsi0_phy 1>, <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>, - <0>, /* dp0 */ - <0>, + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <0>, /* dp1 */ <0>, <0>, /* dp2 */ @@ -4168,7 +4156,7 @@ usb_1_dwc3: usb@a600000 { iommus = <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; };