Message ID | 20230217181409.218008-2-arthurgrillo@riseup.net (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Resolve warnings from AMDGPU | expand |
This patch doesn't apply. Please make sure you are using drm-next or linux-next. Alex On Fri, Feb 17, 2023 at 1:15 PM Arthur Grillo <arthurgrillo@riseup.net> wrote: > > Make implicit enum conversion to avoid -Wenum-conversion warning, such > as: > > drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_mode_vba_21.c:4109:88: warning: implicit conversion from ‘enum <anonymous>’ to ‘enum odm_combine_mode’ [-Wenum-conversion] > 4109 | locals->ODMCombineEnablePerState[i][k] = true; > | ^ > > Signed-off-by: Arthur Grillo <arthurgrillo@riseup.net> > --- > .../amd/display/dc/dml/dcn20/display_mode_vba_20.c | 9 +++++---- > .../amd/display/dc/dml/dcn20/display_mode_vba_20v2.c | 11 ++++++----- > .../amd/display/dc/dml/dcn21/display_mode_vba_21.c | 12 ++++++------ > 3 files changed, 17 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c > index d3b5b6fedf04..1b47249f01d8 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c > @@ -26,6 +26,7 @@ > #include "../display_mode_lib.h" > #include "display_mode_vba_20.h" > #include "../dml_inline_defs.h" > +#include "dml/display_mode_enums.h" > > /* > * NOTE: > @@ -3897,14 +3898,14 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l > mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine = mode_lib->vba.PixelClock[k] / 2 > * (1 + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading / 100.0); > > - locals->ODMCombineEnablePerState[i][k] = false; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithoutODMCombine; > if (mode_lib->vba.ODMCapability) { > if (locals->PlaneRequiredDISPCLKWithoutODMCombine > mode_lib->vba.MaxDispclkRoundedDownToDFSGranularity) { > - locals->ODMCombineEnablePerState[i][k] = true; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; > } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { > - locals->ODMCombineEnablePerState[i][k] = true; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; > } > } > @@ -3957,7 +3958,7 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l > locals->RequiredDISPCLK[i][j] = 0.0; > locals->DISPCLK_DPPCLK_Support[i][j] = true; > for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { > - locals->ODMCombineEnablePerState[i][k] = false; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; > if (locals->SwathWidthYSingleDPP[k] <= locals->MaximumSwathWidth[k]) { > locals->NoOfDPP[i][j][k] = 1; > locals->RequiredDPPCLK[i][j][k] = locals->MinDPPCLKUsingSingleDPP[k] > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c > index edd098c7eb92..4781bf82eec6 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c > @@ -26,6 +26,7 @@ > #include "../display_mode_lib.h" > #include "display_mode_vba_20v2.h" > #include "../dml_inline_defs.h" > +#include "dml/display_mode_enums.h" > > /* > * NOTE: > @@ -4008,17 +4009,17 @@ void dml20v2_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode > mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine = mode_lib->vba.PixelClock[k] / 2 > * (1 + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading / 100.0); > > - locals->ODMCombineEnablePerState[i][k] = false; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithoutODMCombine; > if (mode_lib->vba.ODMCapability) { > if (locals->PlaneRequiredDISPCLKWithoutODMCombine > MaxMaxDispclkRoundedDown) { > - locals->ODMCombineEnablePerState[i][k] = true; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; > } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN20_MAX_DSC_IMAGE_WIDTH)) { > - locals->ODMCombineEnablePerState[i][k] = true; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; > } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { > - locals->ODMCombineEnablePerState[i][k] = true; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; > } > } > @@ -4071,7 +4072,7 @@ void dml20v2_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode > locals->RequiredDISPCLK[i][j] = 0.0; > locals->DISPCLK_DPPCLK_Support[i][j] = true; > for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { > - locals->ODMCombineEnablePerState[i][k] = false; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; > if (locals->SwathWidthYSingleDPP[k] <= locals->MaximumSwathWidth[k]) { > locals->NoOfDPP[i][j][k] = 1; > locals->RequiredDPPCLK[i][j][k] = locals->MinDPPCLKUsingSingleDPP[k] > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c > index 1d84ae50311d..b7c2844d0cbe 100644 > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c > @@ -4102,17 +4102,17 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l > mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine = mode_lib->vba.PixelClock[k] / 2 > * (1 + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading / 100.0); > > - locals->ODMCombineEnablePerState[i][k] = false; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithoutODMCombine; > if (mode_lib->vba.ODMCapability) { > if (locals->PlaneRequiredDISPCLKWithoutODMCombine > MaxMaxDispclkRoundedDown) { > - locals->ODMCombineEnablePerState[i][k] = true; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; > } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN21_MAX_DSC_IMAGE_WIDTH)) { > - locals->ODMCombineEnablePerState[i][k] = true; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; > } else if (locals->HActive[k] > DCN21_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { > - locals->ODMCombineEnablePerState[i][k] = true; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; > mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; > } > } > @@ -4165,7 +4165,7 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l > locals->RequiredDISPCLK[i][j] = 0.0; > locals->DISPCLK_DPPCLK_Support[i][j] = true; > for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { > - locals->ODMCombineEnablePerState[i][k] = false; > + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; > if (locals->SwathWidthYSingleDPP[k] <= locals->MaximumSwathWidth[k]) { > locals->NoOfDPP[i][j][k] = 1; > locals->RequiredDPPCLK[i][j][k] = locals->MinDPPCLKUsingSingleDPP[k] > @@ -5230,7 +5230,7 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l > mode_lib->vba.ODMCombineEnabled[k] = > locals->ODMCombineEnablePerState[mode_lib->vba.VoltageLevel][k]; > } else { > - mode_lib->vba.ODMCombineEnabled[k] = false; > + mode_lib->vba.ODMCombineEnabled[k] = dm_odm_combine_mode_disabled; > } > mode_lib->vba.DSCEnabled[k] = > locals->RequiresDSC[mode_lib->vba.VoltageLevel][k]; > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c index d3b5b6fedf04..1b47249f01d8 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c @@ -26,6 +26,7 @@ #include "../display_mode_lib.h" #include "display_mode_vba_20.h" #include "../dml_inline_defs.h" +#include "dml/display_mode_enums.h" /* * NOTE: @@ -3897,14 +3898,14 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine = mode_lib->vba.PixelClock[k] / 2 * (1 + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading / 100.0); - locals->ODMCombineEnablePerState[i][k] = false; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithoutODMCombine; if (mode_lib->vba.ODMCapability) { if (locals->PlaneRequiredDISPCLKWithoutODMCombine > mode_lib->vba.MaxDispclkRoundedDownToDFSGranularity) { - locals->ODMCombineEnablePerState[i][k] = true; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { - locals->ODMCombineEnablePerState[i][k] = true; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; } } @@ -3957,7 +3958,7 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l locals->RequiredDISPCLK[i][j] = 0.0; locals->DISPCLK_DPPCLK_Support[i][j] = true; for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { - locals->ODMCombineEnablePerState[i][k] = false; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; if (locals->SwathWidthYSingleDPP[k] <= locals->MaximumSwathWidth[k]) { locals->NoOfDPP[i][j][k] = 1; locals->RequiredDPPCLK[i][j][k] = locals->MinDPPCLKUsingSingleDPP[k] diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c index edd098c7eb92..4781bf82eec6 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c @@ -26,6 +26,7 @@ #include "../display_mode_lib.h" #include "display_mode_vba_20v2.h" #include "../dml_inline_defs.h" +#include "dml/display_mode_enums.h" /* * NOTE: @@ -4008,17 +4009,17 @@ void dml20v2_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine = mode_lib->vba.PixelClock[k] / 2 * (1 + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading / 100.0); - locals->ODMCombineEnablePerState[i][k] = false; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithoutODMCombine; if (mode_lib->vba.ODMCapability) { if (locals->PlaneRequiredDISPCLKWithoutODMCombine > MaxMaxDispclkRoundedDown) { - locals->ODMCombineEnablePerState[i][k] = true; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN20_MAX_DSC_IMAGE_WIDTH)) { - locals->ODMCombineEnablePerState[i][k] = true; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { - locals->ODMCombineEnablePerState[i][k] = true; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; } } @@ -4071,7 +4072,7 @@ void dml20v2_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode locals->RequiredDISPCLK[i][j] = 0.0; locals->DISPCLK_DPPCLK_Support[i][j] = true; for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { - locals->ODMCombineEnablePerState[i][k] = false; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; if (locals->SwathWidthYSingleDPP[k] <= locals->MaximumSwathWidth[k]) { locals->NoOfDPP[i][j][k] = 1; locals->RequiredDPPCLK[i][j][k] = locals->MinDPPCLKUsingSingleDPP[k] diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c index 1d84ae50311d..b7c2844d0cbe 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c @@ -4102,17 +4102,17 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine = mode_lib->vba.PixelClock[k] / 2 * (1 + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading / 100.0); - locals->ODMCombineEnablePerState[i][k] = false; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithoutODMCombine; if (mode_lib->vba.ODMCapability) { if (locals->PlaneRequiredDISPCLKWithoutODMCombine > MaxMaxDispclkRoundedDown) { - locals->ODMCombineEnablePerState[i][k] = true; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN21_MAX_DSC_IMAGE_WIDTH)) { - locals->ODMCombineEnablePerState[i][k] = true; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; } else if (locals->HActive[k] > DCN21_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { - locals->ODMCombineEnablePerState[i][k] = true; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_2to1; mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine; } } @@ -4165,7 +4165,7 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l locals->RequiredDISPCLK[i][j] = 0.0; locals->DISPCLK_DPPCLK_Support[i][j] = true; for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { - locals->ODMCombineEnablePerState[i][k] = false; + locals->ODMCombineEnablePerState[i][k] = dm_odm_combine_mode_disabled; if (locals->SwathWidthYSingleDPP[k] <= locals->MaximumSwathWidth[k]) { locals->NoOfDPP[i][j][k] = 1; locals->RequiredDPPCLK[i][j][k] = locals->MinDPPCLKUsingSingleDPP[k] @@ -5230,7 +5230,7 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l mode_lib->vba.ODMCombineEnabled[k] = locals->ODMCombineEnablePerState[mode_lib->vba.VoltageLevel][k]; } else { - mode_lib->vba.ODMCombineEnabled[k] = false; + mode_lib->vba.ODMCombineEnabled[k] = dm_odm_combine_mode_disabled; } mode_lib->vba.DSCEnabled[k] = locals->RequiresDSC[mode_lib->vba.VoltageLevel][k];
Make implicit enum conversion to avoid -Wenum-conversion warning, such as: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_mode_vba_21.c:4109:88: warning: implicit conversion from ‘enum <anonymous>’ to ‘enum odm_combine_mode’ [-Wenum-conversion] 4109 | locals->ODMCombineEnablePerState[i][k] = true; | ^ Signed-off-by: Arthur Grillo <arthurgrillo@riseup.net> --- .../amd/display/dc/dml/dcn20/display_mode_vba_20.c | 9 +++++---- .../amd/display/dc/dml/dcn20/display_mode_vba_20v2.c | 11 ++++++----- .../amd/display/dc/dml/dcn21/display_mode_vba_21.c | 12 ++++++------ 3 files changed, 17 insertions(+), 15 deletions(-)