From patchwork Wed Mar 8 16:39:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 13166115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 505F4C678D5 for ; Wed, 8 Mar 2023 16:40:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AF7EC10E688; Wed, 8 Mar 2023 16:40:55 +0000 (UTC) Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by gabe.freedesktop.org (Postfix) with ESMTPS id F100A10E699 for ; Wed, 8 Mar 2023 16:40:53 +0000 (UTC) Received: by mail-pl1-x634.google.com with SMTP id a2so18223329plm.4 for ; Wed, 08 Mar 2023 08:40:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1678293653; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aMsPp2VhhzL5Iehbwf/OplfTAN7PVsKpf6p+LnZMlVY=; b=JkACBPEA92l5uglZiCge/QKFG4aaB3SpG14Emhv/9msJau/Zrh5QW20mDRyeuuSzBS 06PrSwcfKx8mQcd8AnS+KfWHtSSug8/YK4kHL53aTZvQ6fTMDER2MZKhSZcddbJyBVSh Mo4UcC8J5c/2Didb6I4cUZLZQ6hiXDkQKwwC4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678293653; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aMsPp2VhhzL5Iehbwf/OplfTAN7PVsKpf6p+LnZMlVY=; b=PL+z4BH2IBn+GiH9WclUykML/nmkjpMwSva0sE3CGJyp3Bi457IWwFu8wnr74IEZYu hN717V//fpkA7x8Ve26Z9DqWgMAYUBwkYizQTE33dRe21K0RKrnEz6G7jhpVV/LdKzlV 6xveunkhAxPlUY3vNHPLNMk6bghPJP+CuSOXtQi1uMetILEBLmYSTX3xvjsLssb9gTpN SUM/rOhsfralf0Jh0wCJgSbiyHZY1ZZ8CL1wAJVeRl4RI9Mp8qBVq2J/Qrv/8B8zQADE e/TnKWvHBPJO3/SpHlJcKuo6RV5nGvu9C4F676fKWGUCBlEPNb+fErTgBy/N7WeeusyO ufCA== X-Gm-Message-State: AO0yUKXImxZqFJKCxq5wsBvQ6nig+qNcq7cfnV7gZ4jCF/QoQNjhEIXU jyx5XKZANUHEOlysfXFJBX1DIQ== X-Google-Smtp-Source: AK7set/AYbUdQZpPA6DWyyD2Ery/+yLVLnILKx5EMfTL7NxCXz8dUwgwnu3OM2J61NcUV33XZHj9ug== X-Received: by 2002:a17:903:25c2:b0:19c:b7da:a880 with SMTP id jc2-20020a17090325c200b0019cb7daa880mr17234523plb.11.1678293653524; Wed, 08 Mar 2023 08:40:53 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a8a1:b545:91cc:80b2:f9fe]) by smtp.gmail.com with ESMTPSA id kq3-20020a170903284300b0019b9a075f1fsm10046540plb.80.2023.03.08.08.40.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 08:40:52 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Subject: [PATCH v16 06/16] drm: exynos: dsi: Handle proper host initialization Date: Wed, 8 Mar 2023 22:09:43 +0530 Message-Id: <20230308163953.28506-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230308163953.28506-1-jagan@amarulasolutions.com> References: <20230308163953.28506-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, Matteo Lisi , linux-amarula , Seung-Woo Kim , Frieder Schrempf , Kyungmin Park , dri-devel@lists.freedesktop.org, Adam Ford , Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Marek Szyprowski Host transfer() in the DSI master will invoke only when the DSI commands are sent from DSI devices like DSI Panel or DSI bridges and this host the transfer wouldn't invoke for I2C-based-DSI bridge drivers. Handling DSI host initialization in transfer calls misses the controller setup for I2C configured DSI bridges. This patch updates the DSI host initialization by calling host to init from bridge pre_enable as the bridge pre_enable API is invoked by core as it is common across all classes of DSI device drivers. The host init during pre_enable is conditional and not invoked for Exynos as existing downstream drm panels and bridges in Exynos are expecting the host initialization during DSI transfer. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v16, v15, v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder Changes for v10: - update the to simple logic to handle all platforms Changs for v9 - v8: - none Changes for v2: - check initialized state in samsung_dsim_init Changes for v1: - keep DSI init in host transfer drivers/gpu/drm/exynos/exynos_drm_dsi.c | 27 +++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 0f0834ebbdf3..eb33c2bcac16 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -254,6 +254,9 @@ struct exynos_dsi_transfer { #define DSIM_STATE_CMD_LPM BIT(2) #define DSIM_STATE_VIDOUT_AVAILABLE BIT(3) +#define exynos_dsi_hw_is_exynos(hw) \ + ((hw) >= DSIM_TYPE_EXYNOS3250 && (hw) <= DSIM_TYPE_EXYNOS5433) + enum exynos_dsi_type { DSIM_TYPE_EXYNOS3250, DSIM_TYPE_EXYNOS4210, @@ -1343,6 +1346,9 @@ static int exynos_dsi_init(struct exynos_dsi *dsi) { const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; + if (dsi->state & DSIM_STATE_INITIALIZED) + return 0; + exynos_dsi_reset(dsi); exynos_dsi_enable_irq(dsi); @@ -1355,6 +1361,8 @@ static int exynos_dsi_init(struct exynos_dsi *dsi) exynos_dsi_set_phy_ctrl(dsi); exynos_dsi_init_link(dsi); + dsi->state |= DSIM_STATE_INITIALIZED; + return 0; } @@ -1410,6 +1418,16 @@ static void exynos_dsi_atomic_pre_enable(struct drm_bridge *bridge, } dsi->state |= DSIM_STATE_ENABLED; + + /* + * For Exynos-DSIM the downstream bridge, or panel are expecting + * the host initialization during DSI transfer. + */ + if (!exynos_dsi_hw_is_exynos(dsi->plat_data->hw_type)) { + ret = exynos_dsi_init(dsi); + if (ret) + return; + } } static void exynos_dsi_atomic_enable(struct drm_bridge *bridge, @@ -1601,12 +1619,9 @@ static ssize_t exynos_dsi_host_transfer(struct mipi_dsi_host *host, if (!(dsi->state & DSIM_STATE_ENABLED)) return -EINVAL; - if (!(dsi->state & DSIM_STATE_INITIALIZED)) { - ret = exynos_dsi_init(dsi); - if (ret) - return ret; - dsi->state |= DSIM_STATE_INITIALIZED; - } + ret = exynos_dsi_init(dsi); + if (ret) + return ret; ret = mipi_dsi_create_packet(&xfer.packet, msg); if (ret < 0)