diff mbox series

[v1,5/9] drm/bridge: tc358768: fix TCLK_TRAILCNT computation

Message ID 20230427142934.55435-6-francesco@dolcini.it (mailing list archive)
State New, archived
Headers show
Series drm/bridge: tc358768: various fixes on PLL calculation and DSI timings | expand

Commit Message

Francesco Dolcini April 27, 2023, 2:29 p.m. UTC
From: Francesco Dolcini <francesco.dolcini@toradex.com>

Correct computation of TCLK_TRAILCNT register.

The driver does not implement non-continuous clock mode, so the actual
value doesn't make a practical difference yet. However this change also
ensures that the value does not write to reserved registers bits in case
of under/overflow.

This register must be set to a value that ensures that

TCLK-TRAIL > 60ns
 and
TEOT <= (105 ns + 12 x UI)

with the actual value of TCLK-TRAIL being

(TCLK_TRAILCNT + (1 to 2)) xHSByteClkCycle +
 (2 + (1 to 2)) * HSBYTECLKCycle - (PHY output delay)

with PHY output delay being about

(2 to 3) x MIPIBitClk cycle in the BitClk conversion.

Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---
 drivers/gpu/drm/bridge/tc358768.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

Comments

Robert Foss May 5, 2023, 5:42 p.m. UTC | #1
On Thu, Apr 27, 2023 at 4:35 PM Francesco Dolcini <francesco@dolcini.it> wrote:
>
> From: Francesco Dolcini <francesco.dolcini@toradex.com>
>
> Correct computation of TCLK_TRAILCNT register.
>
> The driver does not implement non-continuous clock mode, so the actual
> value doesn't make a practical difference yet. However this change also
> ensures that the value does not write to reserved registers bits in case
> of under/overflow.
>
> This register must be set to a value that ensures that
>
> TCLK-TRAIL > 60ns
>  and
> TEOT <= (105 ns + 12 x UI)
>
> with the actual value of TCLK-TRAIL being
>
> (TCLK_TRAILCNT + (1 to 2)) xHSByteClkCycle +
>  (2 + (1 to 2)) * HSBYTECLKCycle - (PHY output delay)
>
> with PHY output delay being about
>
> (2 to 3) x MIPIBitClk cycle in the BitClk conversion.
>
> Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver")
> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
> ---
>  drivers/gpu/drm/bridge/tc358768.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c
> index aff400c36066..360c7c65f8c4 100644
> --- a/drivers/gpu/drm/bridge/tc358768.c
> +++ b/drivers/gpu/drm/bridge/tc358768.c
> @@ -9,6 +9,7 @@
>  #include <linux/gpio/consumer.h>
>  #include <linux/i2c.h>
>  #include <linux/kernel.h>
> +#include <linux/minmax.h>
>  #include <linux/module.h>
>  #include <linux/regmap.h>
>  #include <linux/regulator/consumer.h>
> @@ -638,6 +639,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
>         struct mipi_dsi_device *dsi_dev = priv->output.dev;
>         unsigned long mode_flags = dsi_dev->mode_flags;
>         u32 val, val2, lptxcnt, hact, data_type;
> +       s32 raw_val;
>         const struct drm_display_mode *mode;
>         u32 dsibclk_nsk, dsiclk_nsk, ui_nsk, phy_delay_nsk;
>         u32 dsiclk, dsibclk, video_start;
> @@ -749,9 +751,9 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
>         dev_dbg(priv->dev, "TCLK_HEADERCNT: 0x%x\n", val);
>         tc358768_write(priv, TC358768_TCLK_HEADERCNT, val);
>
> -       /* TCLK_TRAIL > 60ns + 3*UI */
> -       val = 60 + tc358768_to_ns(3 * ui_nsk);
> -       val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 5;
> +       /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */
> +       raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 5;
> +       val = clamp(raw_val, 0, 127);
>         dev_dbg(priv->dev, "TCLK_TRAILCNT: 0x%x\n", val);
>         tc358768_write(priv, TC358768_TCLK_TRAILCNT, val);
>
> --
> 2.25.1
>

Reviewed-by: Robert Foss <rfoss@kernel.org>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c
index aff400c36066..360c7c65f8c4 100644
--- a/drivers/gpu/drm/bridge/tc358768.c
+++ b/drivers/gpu/drm/bridge/tc358768.c
@@ -9,6 +9,7 @@ 
 #include <linux/gpio/consumer.h>
 #include <linux/i2c.h>
 #include <linux/kernel.h>
+#include <linux/minmax.h>
 #include <linux/module.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
@@ -638,6 +639,7 @@  static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
 	struct mipi_dsi_device *dsi_dev = priv->output.dev;
 	unsigned long mode_flags = dsi_dev->mode_flags;
 	u32 val, val2, lptxcnt, hact, data_type;
+	s32 raw_val;
 	const struct drm_display_mode *mode;
 	u32 dsibclk_nsk, dsiclk_nsk, ui_nsk, phy_delay_nsk;
 	u32 dsiclk, dsibclk, video_start;
@@ -749,9 +751,9 @@  static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
 	dev_dbg(priv->dev, "TCLK_HEADERCNT: 0x%x\n", val);
 	tc358768_write(priv, TC358768_TCLK_HEADERCNT, val);
 
-	/* TCLK_TRAIL > 60ns + 3*UI */
-	val = 60 + tc358768_to_ns(3 * ui_nsk);
-	val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 5;
+	/* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */
+	raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 5;
+	val = clamp(raw_val, 0, 127);
 	dev_dbg(priv->dev, "TCLK_TRAILCNT: 0x%x\n", val);
 	tc358768_write(priv, TC358768_TCLK_TRAILCNT, val);