| Message ID | 20230502143906.2401-7-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: MST+DSC nukage and state stuff | expand |
On Tue, 2023-05-02 at 17:39 +0300, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Stop dumping state while reading it out. We have a proper > place for that stuff. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > .../gpu/drm/i915/display/intel_crtc_state_dump.c | 2 ++ > drivers/gpu/drm/i915/display/intel_ddi.c | 13 +++---------- > 2 files changed, 5 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > index 0cdcaa49656f..91242ffe0768 100644 > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c > @@ -257,6 +257,8 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, > intel_dump_m_n_config(pipe_config, "dp m2_n2", > pipe_config->lane_count, > &pipe_config->dp_m2_n2); > + drm_dbg_kms(&i915->drm, "fec: %s\n", > + str_enabled_disabled(pipe_config->fec_enable)); > } > > drm_dbg_kms(&i915->drm, "framestart delay: %d, MSA timing delay: %d\n", > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index 41cfa28166e4..4246133950fd 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -3725,17 +3725,10 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder, > intel_cpu_transcoder_get_m2_n2(crtc, cpu_transcoder, > &pipe_config->dp_m2_n2); > > - if (DISPLAY_VER(dev_priv) >= 11) { > - i915_reg_t dp_tp_ctl = dp_tp_ctl_reg(encoder, pipe_config); > - > + if (DISPLAY_VER(dev_priv) >= 11) > pipe_config->fec_enable = > - intel_de_read(dev_priv, dp_tp_ctl) & DP_TP_CTL_FEC_ENABLE; > - > - drm_dbg_kms(&dev_priv->drm, > - "[ENCODER:%d:%s] Fec status: %u\n", > - encoder->base.base.id, encoder->base.name, > - pipe_config->fec_enable); > - } > + intel_de_read(dev_priv, > + dp_tp_ctl_reg(encoder, pipe_config)) & DP_TP_CTL_FEC_ENABLE; > > if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) > pipe_config->infoframes.enable |= Reviewed-by: Luca Coelho <luciano.coelho@intel.com> -- Cheers, Luca.
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index 0cdcaa49656f..91242ffe0768 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -257,6 +257,8 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, intel_dump_m_n_config(pipe_config, "dp m2_n2", pipe_config->lane_count, &pipe_config->dp_m2_n2); + drm_dbg_kms(&i915->drm, "fec: %s\n", + str_enabled_disabled(pipe_config->fec_enable)); } drm_dbg_kms(&i915->drm, "framestart delay: %d, MSA timing delay: %d\n", diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 41cfa28166e4..4246133950fd 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3725,17 +3725,10 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder, intel_cpu_transcoder_get_m2_n2(crtc, cpu_transcoder, &pipe_config->dp_m2_n2); - if (DISPLAY_VER(dev_priv) >= 11) { - i915_reg_t dp_tp_ctl = dp_tp_ctl_reg(encoder, pipe_config); - + if (DISPLAY_VER(dev_priv) >= 11) pipe_config->fec_enable = - intel_de_read(dev_priv, dp_tp_ctl) & DP_TP_CTL_FEC_ENABLE; - - drm_dbg_kms(&dev_priv->drm, - "[ENCODER:%d:%s] Fec status: %u\n", - encoder->base.base.id, encoder->base.name, - pipe_config->fec_enable); - } + intel_de_read(dev_priv, + dp_tp_ctl_reg(encoder, pipe_config)) & DP_TP_CTL_FEC_ENABLE; if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) pipe_config->infoframes.enable |=