@@ -500,6 +500,9 @@ struct amdgpu_display_manager {
* all crtcs.
*/
struct secure_display_context *secure_display_ctxs;
+
+ /* properties for secure_display ROI configuration */
+ struct drm_property *secure_display_roi_property;
#endif
/**
* @hpd_rx_offload_wq:
@@ -726,6 +729,13 @@ struct dm_crtc_state {
struct dc_info_packet vrr_infopacket;
int abm_level;
+
+#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
+ struct {
+ struct drm_property_blob *roi_blob;
+ bool roi_changed : 1;
+ } secure_display_state;
+#endif
};
#define to_dm_crtc_state(x) container_of(x, struct dm_crtc_state, base)
@@ -546,10 +546,14 @@ amdgpu_dm_crtc_secure_display_create_contexts(struct amdgpu_device *adev)
if (!secure_display_ctxs)
return NULL;
+ if (amdgpu_dm_crtc_create_secure_display_properties(adev))
+ DRM_ERROR("amdgpu: failed to create secure display properties.\n");
+
for (i = 0; i < adev->mode_info.num_crtc; i++) {
INIT_WORK(&secure_display_ctxs[i].forward_roi_work, amdgpu_dm_forward_crc_window);
INIT_WORK(&secure_display_ctxs[i].notify_ta_work, amdgpu_dm_crtc_notify_ta_to_read);
secure_display_ctxs[i].crtc = &adev->mode_info.crtcs[i]->base;
+ amdgpu_dm_crtc_attach_secure_display_properties(adev, &adev->mode_info.crtcs[i]->base);
}
return secure_display_ctxs;
@@ -97,10 +97,15 @@ bool amdgpu_dm_crc_window_is_activated(struct drm_crtc *crtc);
void amdgpu_dm_crtc_handle_crc_window_irq(struct drm_crtc *crtc);
struct secure_display_context *amdgpu_dm_crtc_secure_display_create_contexts(
struct amdgpu_device *adev);
+int amdgpu_dm_crtc_create_secure_display_properties(struct amdgpu_device *adev);
+void amdgpu_dm_crtc_attach_secure_display_properties(struct amdgpu_device *adev,
+ struct drm_crtc *crtc);
#else
#define amdgpu_dm_crc_window_is_activated(x)
#define amdgpu_dm_crtc_handle_crc_window_irq(x)
#define amdgpu_dm_crtc_secure_display_create_contexts(x)
+#define amdgpu_dm_crtc_create_secure_display_properties(x)
+#define amdgpu_dm_crtc_attach_secure_display_properties(x)
#endif
#endif /* AMD_DAL_DEV_AMDGPU_DM_AMDGPU_DM_CRC_H_ */
@@ -265,6 +265,10 @@ static struct drm_crtc_state *dm_crtc_duplicate_state(struct drm_crtc *crtc)
state->cm_is_degamma_srgb = cur->cm_is_degamma_srgb;
state->crc_skip_count = cur->crc_skip_count;
state->mpo_requested = cur->mpo_requested;
+
+#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
+ state->secure_display_state = cur->secure_display_state;
+#endif
/* TODO Duplicate dc_stream after objects are stream object is flattened */
return &state->base;
@@ -290,6 +294,33 @@ static void dm_crtc_reset_state(struct drm_crtc *crtc)
__drm_atomic_helper_crtc_reset(crtc, &state->base);
}
+#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
+int amdgpu_dm_crtc_create_secure_display_properties(struct amdgpu_device *adev)
+{
+ struct amdgpu_display_manager *dm = &adev->dm;
+ struct drm_device *dev = adev_to_drm(adev);
+ struct drm_property *roi_prop;
+
+ roi_prop = drm_property_create(dev, DRM_MODE_PROP_BLOB,
+ "SECURE_DISPLAY_ROI", 0);
+ if (!roi_prop)
+ return -ENOMEM;
+
+ dm->secure_display_roi_property = roi_prop;
+
+ return 0;
+}
+
+void amdgpu_dm_crtc_attach_secure_display_properties(struct amdgpu_device *adev,
+ struct drm_crtc *crtc)
+{
+ struct amdgpu_display_manager *dm = &adev->dm;
+
+ if (dm->secure_display_roi_property)
+ drm_object_attach_property(&crtc->base, dm->secure_display_roi_property, 0);
+}
+#endif
+
#ifdef CONFIG_DEBUG_FS
static int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc)
{
@@ -1303,6 +1303,26 @@ struct drm_mode_rect {
__s32 y2;
};
+/**
+ * struct drm_roi - The enablement and region of interest (ROI) of secure display
+ * @x_start: Horizontal starting coordinate of ROI.
+ * @y_start: Vertical starting coordinate of ROI.
+ * @x_end: Horizontal ending coordinate of ROI.
+ * @y_end: Vertical ending coordinate of ROI.
+ * @secure_display_enable: To enable or disable secure display.
+ *
+ * Userspace uses this structure to configure the region of interest and
+ * enablement for secure display.
+ */
+struct drm_roi {
+ __u32 x_start;
+ __u32 y_start;
+ __u32 x_end;
+ __u32 y_end;
+ __u8 secure_display_enable;
+ __u8 pad[7];
+};
+
#if defined(__cplusplus)
}
#endif
Add a new blob properties as well as the create and attach functions for configuring region of interested (ROI) of secure display. Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 10 ++++++ .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 4 +++ .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h | 5 +++ .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 31 +++++++++++++++++++ include/uapi/drm/drm_mode.h | 20 ++++++++++++ 5 files changed, 70 insertions(+)