diff mbox series

[4/7] drm/amd/display: Implement set/get functions for secure display CRC properties

Message ID 20230516053931.1700117-5-HaoPing.Liu@amd.com (mailing list archive)
State New, archived
Headers show
Series Secure display with new CRTC properties | expand

Commit Message

Liu, HaoPing (Alan) May 16, 2023, 5:39 a.m. UTC 
Implement set/get functions as the callback for userspace to get the CRC
result values of the corresponding ROI configuration of secure display.

Signed-off-by: Alan Liu <HaoPing.Liu@amd.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  1 +
 .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c    | 38 ++++++++++++++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 74e42257a608..b389b1d1c370 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -736,6 +736,7 @@  struct dm_crtc_state {
 #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
 	struct {
 		struct drm_property_blob *roi_blob;
+		struct drm_property_blob *crc_blob;
 		bool roi_changed : 1;
 	} secure_display_state;
 #endif
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index 4457eac8273e..0e9834e0506d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
@@ -359,6 +359,10 @@  static int amdgpu_dm_crtc_atomic_set_property(struct drm_crtc *crtc,
 		dm_state->secure_display_state.roi_changed |=
 			drm_property_replace_blob(old_blob, new_blob);
 
+	} else if (property == adev->dm.secure_display_crc_property) {
+		/* don't let user set CRC data */
+		return -EPERM;
+
 	} else
 		return -EINVAL;
 
@@ -373,12 +377,44 @@  static int amdgpu_dm_crtc_atomic_get_property(struct drm_crtc *crtc,
 	struct drm_device *dev = crtc->dev;
 	struct amdgpu_device *adev = drm_to_adev(dev);
 	struct dm_crtc_state *dm_state = to_dm_crtc_state(crtc_state);
+	struct secure_display_context *secure_display_ctx =
+		&adev->dm.secure_display_ctxs[crtc->index];
 
 	if (property == adev->dm.secure_display_roi_property)
 		*val = (dm_state->secure_display_state.roi_blob)
 			? dm_state->secure_display_state.roi_blob->base.id : 0;
 
-	else
+	else if (property == adev->dm.secure_display_crc_property) {
+		struct drm_crc *blob_data;
+		struct drm_property_blob *blob;
+		unsigned long flag;
+
+		if (!amdgpu_dm_crc_window_is_activated(crtc)) {
+			*val = 0;
+			return 0;
+		}
+
+		/* save new value to blob */
+		blob = drm_property_create_blob(dev,
+						sizeof(struct drm_crc),
+						NULL);
+		if (IS_ERR(blob)) {
+			*val = 0;
+			return -ENOMEM;
+		}
+
+		blob_data = (struct drm_crc *) blob->data;
+		spin_lock_irqsave(&secure_display_ctx->crc.lock, flag);
+		blob_data->crc_r = secure_display_ctx->crc.crc_R;
+		blob_data->crc_g = secure_display_ctx->crc.crc_G;
+		blob_data->crc_b = secure_display_ctx->crc.crc_B;
+		blob_data->frame_count = secure_display_ctx->crc.frame_count;
+		spin_unlock_irqrestore(&secure_display_ctx->crc.lock, flag);
+
+		drm_property_replace_blob(&dm_state->secure_display_state.crc_blob, blob);
+		*val = blob->base.id;
+
+	} else
 		return -EINVAL;
 
 	return 0;