| Message ID | 20230606075527.155346-1-suhui@nfschina.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/bridge: ti-sn65dsi86: Avoid possible buffer overflow | expand |
Hi, On Tue, Jun 6, 2023 at 12:56 AM Su Hui <suhui@nfschina.com> wrote: > > Smatch error:buffer overflow 'ti_sn_bridge_refclk_lut' 5 <= 5. > > Fixes: cea86c5bb442 ("drm/bridge: ti-sn65dsi86: Implement the pwm_chip") > Signed-off-by: Su Hui <suhui@nfschina.com> > --- > drivers/gpu/drm/bridge/ti-sn65dsi86.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c > index 7a748785c545..952aae4221e7 100644 > --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c > +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c > @@ -305,7 +305,8 @@ static void ti_sn_bridge_set_refclk_freq(struct ti_sn65dsi86 *pdata) > * The PWM refclk is based on the value written to SN_DPPLL_SRC_REG, > * regardless of its actual sourcing. > */ > - pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; > + if (i < refclk_lut_size) > + pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; I don't think this is quite the right fix. I don't think we can just skip assigning "pdata->pwm_refclk_freq". In general I think we're in pretty bad shape if we ever fail to match a refclk from the table and I'm not quite sure how the bridge chip could work at all in this case. Probably that at least deserves a warning message in the logs. There's no place to return an error though, so I guess the warning is the best we can do and then we can do our best to do something reasonable. In this case, I think "reasonable" might be that if the for loop exits and "i == refclk_lut_size" that we should set "i" to 1. According to the datasheet [1] setting a value of 5 (which the existing code does) is the same as setting a value of 1 (the default) and if it's 1 then we'll be able to look this up in the table. [1] https://www.ti.com/lit/gpn/sn65dsi86 -Doug
Hi, On 2023/6/6 23:28, Doug Anderson wrote: > Hi, > > On Tue, Jun 6, 2023 at 12:56 AM Su Hui <suhui@nfschina.com> wrote: >> Smatch error:buffer overflow 'ti_sn_bridge_refclk_lut' 5 <= 5. >> >> Fixes: cea86c5bb442 ("drm/bridge: ti-sn65dsi86: Implement the pwm_chip") >> Signed-off-by: Su Hui <suhui@nfschina.com> >> --- >> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c >> index 7a748785c545..952aae4221e7 100644 >> --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c >> +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c >> @@ -305,7 +305,8 @@ static void ti_sn_bridge_set_refclk_freq(struct ti_sn65dsi86 *pdata) >> * The PWM refclk is based on the value written to SN_DPPLL_SRC_REG, >> * regardless of its actual sourcing. >> */ >> - pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; >> + if (i < refclk_lut_size) >> + pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; > I don't think this is quite the right fix. I don't think we can just > skip assigning "pdata->pwm_refclk_freq". In general I think we're in > pretty bad shape if we ever fail to match a refclk from the table and > I'm not quite sure how the bridge chip could work at all in this case. > Probably that at least deserves a warning message in the logs. There's > no place to return an error though, so I guess the warning is the best > we can do and then we can do our best to do something reasonable. > > In this case, I think "reasonable" might be that if the for loop exits > and "i == refclk_lut_size" that we should set "i" to 1. According to > the datasheet [1] setting a value of 5 (which the existing code does) > is the same as setting a value of 1 (the default) and if it's 1 then > we'll be able to look this up in the table. I think you are right. And " if ( i >= refclk_lut_size) i=1" is a suitable change. I will send patch v2 a litter latter. Thanks for your suggestion. Su Hui > > [1] https://www.ti.com/lit/gpn/sn65dsi86 > > -Doug
Hi, On 2023/6/6 23:28, Doug Anderson wrote: > Hi, > > On Tue, Jun 6, 2023 at 12:56 AM Su Hui <suhui@nfschina.com> wrote: >> Smatch error:buffer overflow 'ti_sn_bridge_refclk_lut' 5 <= 5. >> >> Fixes: cea86c5bb442 ("drm/bridge: ti-sn65dsi86: Implement the pwm_chip") >> Signed-off-by: Su Hui <suhui@nfschina.com> >> --- >> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c >> index 7a748785c545..952aae4221e7 100644 >> --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c >> +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c >> @@ -305,7 +305,8 @@ static void ti_sn_bridge_set_refclk_freq(struct ti_sn65dsi86 *pdata) >> * The PWM refclk is based on the value written to SN_DPPLL_SRC_REG, >> * regardless of its actual sourcing. >> */ >> - pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; >> + if (i < refclk_lut_size) >> + pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; > I don't think this is quite the right fix. I don't think we can just > skip assigning "pdata->pwm_refclk_freq". In general I think we're in > pretty bad shape if we ever fail to match a refclk from the table and > I'm not quite sure how the bridge chip could work at all in this case. > Probably that at least deserves a warning message in the logs. There's > no place to return an error though, so I guess the warning is the best > we can do and then we can do our best to do something reasonable. > > In this case, I think "reasonable" might be that if the for loop exits > and "i == refclk_lut_size" that we should set "i" to 1. According to > the datasheet [1] setting a value of 5 (which the existing code does) > is the same as setting a value of 1 (the default) and if it's 1 then > we'll be able to look this up in the table. I think you are right, set i to 1 if i >= refclk_lut_size. I will resend this patch soon. Thanks for your reply! Su Hui > > [1] https://www.ti.com/lit/gpn/sn65dsi86 > > -Doug
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index 7a748785c545..952aae4221e7 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -305,7 +305,8 @@ static void ti_sn_bridge_set_refclk_freq(struct ti_sn65dsi86 *pdata) * The PWM refclk is based on the value written to SN_DPPLL_SRC_REG, * regardless of its actual sourcing. */ - pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; + if (i < refclk_lut_size) + pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; } static void ti_sn65dsi86_enable_comms(struct ti_sn65dsi86 *pdata)
Smatch error:buffer overflow 'ti_sn_bridge_refclk_lut' 5 <= 5. Fixes: cea86c5bb442 ("drm/bridge: ti-sn65dsi86: Implement the pwm_chip") Signed-off-by: Su Hui <suhui@nfschina.com> --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)