@@ -187,6 +187,21 @@ static const struct drm_display_mode t28cp45tn89_mode = {
.flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC,
};
+static const struct drm_display_mode et028013dma_mode = {
+ .clock = 3000,
+ .hdisplay = 240,
+ .hsync_start = 240 + 38,
+ .hsync_end = 240 + 38 + 10,
+ .htotal = 240 + 38 + 10 + 10,
+ .vdisplay = 320,
+ .vsync_start = 320 + 8,
+ .vsync_end = 320 + 8 + 4,
+ .vtotal = 320 + 8 + 4 + 4,
+ .width_mm = 43,
+ .height_mm = 58,
+ .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
+};
+
struct st7789_panel_info default_panel = {
.mode = &default_mode,
.invert_mode = true,
@@ -203,6 +218,14 @@ struct st7789_panel_info t28cp45tn89_panel = {
DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
};
+struct st7789_panel_info et028013dma_panel = {
+ .mode = &et028013dma_mode,
+ .invert_mode = true,
+ .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+ .bus_flags = DRM_BUS_FLAG_DE_HIGH |
+ DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
+};
+
static int st7789v_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -474,6 +497,7 @@ static void st7789v_remove(struct spi_device *spi)
static const struct spi_device_id st7789v_spi_id[] = {
{ "st7789v", (unsigned long) &default_panel },
{ "t28cp45tn89-v17", (unsigned long) &t28cp45tn89_panel },
+ { "et028013dma", (unsigned long) &et028013dma_panel },
{ }
};
MODULE_DEVICE_TABLE(spi, st7789v_spi_id);
@@ -481,6 +505,7 @@ MODULE_DEVICE_TABLE(spi, st7789v_spi_id);
static const struct of_device_id st7789v_of_match[] = {
{ .compatible = "sitronix,st7789v", .data = &default_panel },
{ .compatible = "inanbo,t28cp45tn89-v17", .data = &t28cp45tn89_panel },
+ { .compatible = "edt,et028013dma", .data = &et028013dma_panel },
{ }
};
MODULE_DEVICE_TABLE(of, st7789v_of_match);
This panel from Emerging Display Technologies Corporation features an ST7789V2 LCD controller panel inside which is almost identical to what the Sitronix panel driver supports. In practice, the module physical size is specific, and experiments show that the display will malfunction if any of the following situation occurs: * Pixel clock is above 3MHz * Pixel clock is not inverted I could not properly identify the reasons behind these failures, scope captures show valid input signals. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- .../gpu/drm/panel/panel-sitronix-st7789v.c | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+)