| Message ID | 20230725073234.55892-2-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MediaTek DisplayPort: support eDP and aux-bus | expand |
Hi, Angelo: On Tue, 2023-07-25 at 09:32 +0200, AngeloGioacchino Del Regno wrote: > If reading the RX capabilities fails the training pattern will be set > wrongly: add error checking for drm_dp_read_dpcd_caps() and return if > anything went wrong with it. > > While at it, also add a less critical error check when writing to > clear the ESI0 IRQ vector. Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Fixes: f70ac097a2cf ("drm/mediatek: Add MT8195 Embedded DisplayPort > driver") > Signed-off-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > Tested-by: Chen-Yu Tsai <wenst@chromium.org> > Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> > --- > drivers/gpu/drm/mediatek/mtk_dp.c | 15 ++++++++++----- > 1 file changed, 10 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c > b/drivers/gpu/drm/mediatek/mtk_dp.c > index 64eee77452c0..c58b775877a3 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dp.c > +++ b/drivers/gpu/drm/mediatek/mtk_dp.c > @@ -1588,7 +1588,9 @@ static int mtk_dp_parse_capabilities(struct > mtk_dp *mtk_dp) > u8 val; > ssize_t ret; > > - drm_dp_read_dpcd_caps(&mtk_dp->aux, mtk_dp->rx_cap); > + ret = drm_dp_read_dpcd_caps(&mtk_dp->aux, mtk_dp->rx_cap); > + if (ret < 0) > + return ret; > > if (drm_dp_tps4_supported(mtk_dp->rx_cap)) > mtk_dp->train_info.channel_eq_pattern = > DP_TRAINING_PATTERN_4; > @@ -1615,10 +1617,13 @@ static int mtk_dp_parse_capabilities(struct > mtk_dp *mtk_dp) > return ret == 0 ? -EIO : ret; > } > > - if (val) > - drm_dp_dpcd_writeb(&mtk_dp->aux, > - DP_DEVICE_SERVICE_IRQ_VECTOR > _ESI0, > - val); > + if (val) { > + ret = drm_dp_dpcd_writeb(&mtk_dp->aux, > + DP_DEVICE_SERVICE_IRQ_ > VECTOR_ESI0, > + val); > + if (ret < 0) > + return ret; > + } > } > > return 0;
diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index 64eee77452c0..c58b775877a3 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -1588,7 +1588,9 @@ static int mtk_dp_parse_capabilities(struct mtk_dp *mtk_dp) u8 val; ssize_t ret; - drm_dp_read_dpcd_caps(&mtk_dp->aux, mtk_dp->rx_cap); + ret = drm_dp_read_dpcd_caps(&mtk_dp->aux, mtk_dp->rx_cap); + if (ret < 0) + return ret; if (drm_dp_tps4_supported(mtk_dp->rx_cap)) mtk_dp->train_info.channel_eq_pattern = DP_TRAINING_PATTERN_4; @@ -1615,10 +1617,13 @@ static int mtk_dp_parse_capabilities(struct mtk_dp *mtk_dp) return ret == 0 ? -EIO : ret; } - if (val) - drm_dp_dpcd_writeb(&mtk_dp->aux, - DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0, - val); + if (val) { + ret = drm_dp_dpcd_writeb(&mtk_dp->aux, + DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0, + val); + if (ret < 0) + return ret; + } } return 0;
If reading the RX capabilities fails the training pattern will be set wrongly: add error checking for drm_dp_read_dpcd_caps() and return if anything went wrong with it. While at it, also add a less critical error check when writing to clear the ESI0 IRQ vector. Fixes: f70ac097a2cf ("drm/mediatek: Add MT8195 Embedded DisplayPort driver") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> --- drivers/gpu/drm/mediatek/mtk_dp.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-)