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Mon, 7 Aug 2023 05:22:46 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 8/9] dt-bindings: display: bridge: Document Freescale i.MX93 MIPI DSI Date: Mon, 7 Aug 2023 13:26:07 +0800 Message-Id: <20230807052608.3038698-9-victor.liu@nxp.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230807052608.3038698-1-victor.liu@nxp.com> References: <20230807052608.3038698-1-victor.liu@nxp.com> X-ClientProxiedBy: SI2PR01CA0006.apcprd01.prod.exchangelabs.com (2603:1096:4:191::14) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|PA4PR04MB9390:EE_ X-MS-Office365-Filtering-Correlation-Id: 6104382d-7767-4f93-42ba-08db97065585 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: UT35+6FAvWXpTHNOtLRLydFqVNPg2JKbQp2Dw2GYyOSO9n/rlyQdXJyw4ydP1GExVZJnwxqjx53vscX5YDjfT+fzfn3DlhQFlmV8RAWDP2iW7NqqFPjSl1d1kUJv/GwxvemMhPPq6aKNDt3XQAbCUBW8LuN7xUGwyXvD2lOkh9htkmPIcr06GRWJMoeWq6MynDZl8DZ5oSh9GoeqiH+w7dHHWIGPEnT36tXAwCzZtMJNaHtQx87TJKSFqkyCekQbt3cDAhN2XAHeS7tAKuTM4LxPXClkgpQgt+QYWLv1gXw+L9fw5hdqt+HXuBhaB9yGqN6M+OXBH3yDru1ol6U7yJ1F6n3Izp5VJnX5p0e8MDSAKHsfn2MW0dT9oK0/nE4uPIbvWyOq3ooN/pk7UKx1JdhamN0ZW0usTGVBeD5k9DEvqUrvbTs1yDBNPHKfwDjtcI81Yc4esxw3FeBAIWXyAU06+N8MXDZA6fXhJMo5kzP6f+LTf3AbHCSNGnFzQe2VCk80cWsDQl4nfxv2n7zXLGZyo7sLydopJaMTGv8ha4tN2k4vE7Gkbzdd5xc5LEAEVL2ml6gd2A0y34Wn/NFhPYk5/UftIkLO4qo3jJ+PS3fAYwZ1DgfASFOXpQhSZGRU3YIebuomxl8tLhczbzk/Jw== X-Forefront-Antispam-Report: CIP:255.255.255.255; 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Some configurations and extensions to them are controlled by i.MX93 media blk-ctrl. Signed-off-by: Liu Ying Reviewed-by: Rob Herring --- v2->v3: * No change. v1->v2: * Add Rob's R-b tag. .../display/bridge/fsl,imx93-mipi-dsi.yaml | 115 ++++++++++++++++++ 1 file changed, 115 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx93-mipi-dsi.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx93-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx93-mipi-dsi.yaml new file mode 100644 index 000000000000..d6e51d0cf546 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx93-mipi-dsi.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX93 specific extensions to Synopsys Designware MIPI DSI + +maintainers: + - Liu Ying + +description: | + There is a Synopsys Designware MIPI DSI Host Controller and a Synopsys + Designware MIPI DPHY embedded in Freescale i.MX93 SoC. Some configurations + and extensions to them are controlled by i.MX93 media blk-ctrl. + +allOf: + - $ref: snps,dw-mipi-dsi.yaml# + +properties: + compatible: + const: fsl,imx93-mipi-dsi + + clocks: + items: + - description: apb clock + - description: pixel clock + - description: PHY configuration clock + - description: PHY reference clock + + clock-names: + items: + - const: pclk + - const: pix + - const: phy_cfg + - const: phy_ref + + interrupts: + maxItems: 1 + + fsl,media-blk-ctrl: + $ref: /schemas/types.yaml#/definitions/phandle + description: + i.MX93 media blk-ctrl, as a syscon, controls pixel component bit map + configurations from LCDIF display controller to the MIPI DSI host + controller and MIPI DPHY PLL related configurations through PLL SoC + interface. + + power-domains: + maxItems: 1 + +required: + - compatible + - interrupts + - fsl,media-blk-ctrl + - power-domains + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + dsi@4ae10000 { + compatible = "fsl,imx93-mipi-dsi"; + reg = <0x4ae10000 0x10000>; + interrupts = ; + clocks = <&clk IMX93_CLK_MIPI_DSI_GATE>, + <&clk IMX93_CLK_MEDIA_DISP_PIX>, + <&clk IMX93_CLK_MIPI_PHY_CFG>, + <&clk IMX93_CLK_24M>; + clock-names = "pclk", "pix", "phy_cfg", "phy_ref"; + fsl,media-blk-ctrl = <&media_blk_ctrl>; + power-domains = <&media_blk_ctrl IMX93_MEDIABLK_PD_MIPI_DSI>; + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "raydium,rm67191"; + reg = <0>; + reset-gpios = <&adp5585gpio 6 GPIO_ACTIVE_LOW>; + dsi-lanes = <4>; + video-mode = <2>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_to_lcdif: endpoint { + remote-endpoint = <&lcdif_to_dsi>; + }; + }; + + port@1 { + reg = <1>; + + dsi_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + };