From patchwork Thu Aug 17 14:24:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13356569 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4744BC30624 for ; Thu, 17 Aug 2023 14:31:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EDF0110E4CE; Thu, 17 Aug 2023 14:30:57 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id BA23710E4B5; Thu, 17 Aug 2023 14:30:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692282643; x=1723818643; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZyaUrvKHcj30vDWSYzbe4ayYHpz3hSornK62Qta0hs8=; b=SFUDPrTIc9RF4iUI39pbYrVkr45YE/NIef4nFdn2MFmnRzN+Eap/Rpbg 0ZZu4UGry9oHzv0S0ARiP9RpKpyuQLeVDTxvHFs3YGrIIx6PnZJnmqZwH dB4Wb760xF47wXX5tHE6MzUJisFcDp9X19YqqkL4yuUVWQri1bqVHSOyZ HWJs3I/Igmowc4sP7FrUv11Wcv8rPvY1DHaOMjyhRSlcEOpGrpabi8m2I RzcAFs6ffxZ+Rg/G5NWu5NJRfAmqifGwhQmMNjcYUiEH31cq7i91Y82kd 4FM9nX4Qfc7ydCobAqIoFSsqvLUdKKsRhv6hcntMbJMRbr0vbI7tpLNwk g==; X-IronPort-AV: E=McAfee;i="6600,9927,10805"; a="376581655" X-IronPort-AV: E=Sophos;i="6.01,180,1684825200"; d="scan'208";a="376581655" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Aug 2023 07:28:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10805"; a="858244068" X-IronPort-AV: E=Sophos;i="6.01,180,1684825200"; d="scan'208";a="858244068" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Aug 2023 07:28:29 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH 05/18] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp Date: Thu, 17 Aug 2023 19:54:46 +0530 Message-Id: <20230817142459.89764-6-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230817142459.89764-1-ankit.k.nautiyal@intel.com> References: <20230817142459.89764-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stanislav.lisovskiy@intel.com, anusha.srivatsa@intel.com, navaremanasi@google.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In Bigjoiner check for DSC, bigjoiner interface bits for DP for DISPLAY > 13 is 36 (Bspec: 49259). v2: Corrected Display ver to 13. v3: Follow convention for conditional statement. (Ville) v4: Fix check for display ver. (Ville) v5: Added note for 2 PPC. (Stan) Signed-off-by: Ankit Nautiyal Reviewed-by: Ville Syrjälä Reviewed-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_dp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 9775c1cbed2b..a7c706a2327f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -802,8 +802,11 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram); if (bigjoiner) { + int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; + /* With bigjoiner multiple dsc engines are used in parallel so PPC is 2 */ + int ppc = 2; u32 max_bpp_bigjoiner = - i915->display.cdclk.max_cdclk_freq * 48 / + i915->display.cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits / intel_dp_mode_to_fec_clock(mode_clock); bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);