diff mbox series

[1/3] clk: keep clock rate when parent rate changes

Message ID 20230825-pll-mipi_keep_rate-v1-1-35bc43570730@oltmanns.dev (mailing list archive)
State New, archived
Headers show
Series Make Allwinner A64's pll-mipi keep its rate when parent rate changes | expand

Commit Message

Frank Oltmanns Aug. 25, 2023, 5:36 a.m. UTC
Allow clocks to keep their rate when parent (or grandparent) rate
changes.

Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
---
 drivers/clk/clk.c            | 48 +++++++++++++++++++++++++++++++++++++++++++-
 include/linux/clk-provider.h |  2 ++
 2 files changed, 49 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index c249f9791ae8..a382876c18da 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -2245,6 +2245,9 @@  static struct clk_core *clk_calc_new_rates(struct clk_core *core,
 	    best_parent_rate != parent->rate)
 		top = clk_calc_new_rates(parent, best_parent_rate);
 
+	if ((core->flags & CLK_KEEP_RATE))
+		core->req_rate = new_rate;
+
 out:
 	clk_calc_subtree(core, new_rate, parent, p_index);
 
@@ -2343,9 +2346,51 @@  static void clk_change_rate(struct clk_core *core)
 		clk_core_prepare_enable(parent);
 
 	trace_clk_set_rate(core, core->new_rate);
+	if (!skip_set_rate && core->ops->set_rate) {
+		if (core->flags & CLK_KEEP_RATE && clk_core_can_round(core)) {
+			struct clk_rate_request req;
+			unsigned long flags;
+			int ret;
+
+			clk_core_init_rate_req(core, &req, core->req_rate);
 
-	if (!skip_set_rate && core->ops->set_rate)
+			/*
+			 * Re-determine the new rate for the clock based on the requested rate.
+			 *
+			 * In this stage, the clock must not set a new parent rate or try a
+			 * different parent, so temporarily prevent that from happening.
+			 */
+			flags = core->flags;
+			core->flags &= ~(CLK_SET_RATE_PARENT);
+			core->flags |= CLK_SET_RATE_NO_REPARENT;
+			ret = clk_core_determine_round_nolock(core, &req);
+			core->flags = flags;
+
+			/*
+			 * If necessary, store the new rate and propagate to the subtree.
+			 *
+			 * The previously calculated rates (new_rate) of this core's subtree are no
+			 * longer correct, because this clock will be set to a rate that differs
+			 * from the rate that was used to calculate the subtree.
+			 *
+			 * FIXME: This means that the rate also differs from the new_rate that was
+			 *        announced in the PRE_RATE_CHANGE notification. Be careful when
+			 *        applying this flag, that the subtree does not depend on the
+			 *        correct new rate being propagated.
+			 */
+			if (ret >= 0 && req.rate != core->new_rate) {
+				core->new_rate = req.rate;
+				pr_debug("%s: clk %s: keeping rate %lu as %lu\n",
+				       __func__, core->name, core->req_rate, core->new_rate);
+
+				hlist_for_each_entry(child, &core->children, child_node) {
+					child->new_rate = clk_recalc(child, core->new_rate);
+					clk_calc_subtree(child, child->new_rate, NULL, 0);
+				}
+			}
+		}
 		core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
+	}
 
 	trace_clk_set_rate_complete(core, core->new_rate);
 
@@ -3388,6 +3433,7 @@  static const struct {
 	ENTRY(CLK_IS_CRITICAL),
 	ENTRY(CLK_OPS_PARENT_ENABLE),
 	ENTRY(CLK_DUTY_CYCLE_PARENT),
+	ENTRY(CLK_KEEP_RATE),
 #undef ENTRY
 };
 
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index ec32ec58c59f..fba78a99ac56 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -32,6 +32,8 @@ 
 #define CLK_OPS_PARENT_ENABLE	BIT(12)
 /* duty cycle call may be forwarded to the parent clock */
 #define CLK_DUTY_CYCLE_PARENT	BIT(13)
+/* try to keep rate, if parent rate changes */
+#define CLK_KEEP_RATE		BIT(14)
 
 struct clk;
 struct clk_hw;