From patchwork Mon Sep 18 19:22:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 13390322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18DD6CD13D2 for ; Mon, 18 Sep 2023 19:22:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7FA4D10E2D2; Mon, 18 Sep 2023 19:22:29 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id 40D0010E2C7 for ; Mon, 18 Sep 2023 19:22:15 +0000 (UTC) X-UUID: a99f0888565811eea33bb35ae8d461a2-20230919 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=0FGZehlLCno83Z8FTy72FubzQX4DbX4unNwvaHAIttY=; b=BjI4+8JTWdo0gAbT3cionUglmDvb/sa8dSORvuvwBYMQsNq2fpAV1z0b5yhXP52cQZzijqvMAXvOoZiIOfCm0Co48SWmx8Cov+InaUpp6xGz7RyK/4DhUYUJ1B3jA12se4ZUL1Oda7BjDCZv8GH1e1HKxS8c7zQNbNQnW+j50J8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.31, REQID:19ca8d34-cb2b-492b-9949-bdfc4c3d79cb, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:0ad78a4, CLOUDID:d10b1514-4929-4845-9571-38c601e9c3c9, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: a99f0888565811eea33bb35ae8d461a2-20230919 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 845686881; Tue, 19 Sep 2023 03:22:09 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Tue, 19 Sep 2023 03:22:08 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Tue, 19 Sep 2023 03:22:08 +0800 From: Jason-JH.Lin To: Jassi Brar , Krzysztof Kozlowski , Rob Herring , Matthias Brugger , Chun-Kuang Hu , AngeloGioacchino Del Regno Subject: [PATCH 11/15] soc: mediatek: Add cmdq_insert_backup_cookie before EOC for secure pkt Date: Tue, 19 Sep 2023 03:22:00 +0800 Message-ID: <20230918192204.32263-12-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230918192204.32263-1-jason-jh.lin@mediatek.com> References: <20230918192204.32263-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Conor Dooley , Elvis Wang , "Jason-JH . Lin" , Singo Chang , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Project_Global_Chrome_Upstream_Group@mediatek.com, Jason-ch Chen , Nancy Lin , Johnson Wang , Shawn Sung , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add cmdq_insert_backup_cookie to append some commands before EOC: 1. Get GCE HW thread execute count from the GCE HW register. 2. Add 1 to the execute count and then store into a shared memory. 3. Set a software event siganl as secure irq to GCE HW. Since the value of execute count + 1 is stored in a shared memory, CMDQ driver in the normal world can use it to handle task done in irq handler and CMDQ driver in the secure world will use it to schedule the task slot for each secure thread. Signed-off-by: Jason-JH.Lin --- drivers/soc/mediatek/mtk-cmdq-helper.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index bbb127620bb3..7b5392878aba 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #define CMDQ_WRITE_ENABLE_MASK BIT(0) @@ -153,7 +154,9 @@ void cmdq_pkt_destroy(struct cmdq_pkt *pkt) dma_unmap_single(client->chan->mbox->dev, pkt->pa_base, pkt->buf_size, DMA_TO_DEVICE); + kfree(pkt->va_base); + kfree(pkt->sec_data); kfree(pkt); } EXPORT_SYMBOL(cmdq_pkt_destroy); @@ -458,6 +461,12 @@ int cmdq_pkt_finalize(struct cmdq_pkt *pkt) struct cmdq_instruction inst = { {0} }; int err; + if (pkt->sec_data) { + err = cmdq_sec_insert_backup_cookie(pkt); + if (err < 0) + return err; + } + /* insert EOC and generate IRQ for each command iteration */ inst.op = CMDQ_CODE_EOC; inst.value = CMDQ_EOC_IRQ_EN;