diff mbox series

[03/15] soc: mailbox: Add SPR definition for GCE

Message ID 20230918192204.32263-4-jason-jh.lin@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Add CMDQ secure driver for SVP | expand

Commit Message

Jason-JH Lin (林睿祥) Sept. 18, 2023, 7:21 p.m. UTC
GCE has specific purpose registers, abbreviated as SPR.
Client can us SPR to store data or programs.

In CMDQ driver, it allows client to STORE or LOAD data into SPR.
The value stored in SPR will be cleared after reset GCE HW thread.

There are 4 SPR (register index 0 - 3) in every GCE HW thread.
SPR is thread-independent and HW secure protected.

Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
 include/linux/soc/mediatek/mtk-cmdq.h | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Krzysztof Kozlowski Sept. 23, 2023, 6:02 p.m. UTC | #1
On 18/09/2023 21:21, Jason-JH.Lin wrote:
> GCE has specific purpose registers, abbreviated as SPR.
> Client can us SPR to store data or programs.
> 
> In CMDQ driver, it allows client to STORE or LOAD data into SPR.
> The value stored in SPR will be cleared after reset GCE HW thread.
> 
> There are 4 SPR (register index 0 - 3) in every GCE HW thread.
> SPR is thread-independent and HW secure protected.
> 
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> ---
>  include/linux/soc/mediatek/mtk-cmdq.h | 5 +++++

There is no user of this... Why do you add unused defines?

Best regards,
Krzysztof
Jason-JH Lin (林睿祥) Sept. 25, 2023, 5:08 a.m. UTC | #2
Hi Krzysztof,

Thanks for the reviews.

On Sat, 2023-09-23 at 20:02 +0200, Krzysztof Kozlowski wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  On 18/09/2023 21:21, Jason-JH.Lin wrote:
> > GCE has specific purpose registers, abbreviated as SPR.
> > Client can us SPR to store data or programs.
> > 
> > In CMDQ driver, it allows client to STORE or LOAD data into SPR.
> > The value stored in SPR will be cleared after reset GCE HW thread.
> > 
> > There are 4 SPR (register index 0 - 3) in every GCE HW thread.
> > SPR is thread-independent and HW secure protected.
> > 
> > Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> > ---
> >  include/linux/soc/mediatek/mtk-cmdq.h | 5 +++++
> 
> There is no user of this... Why do you add unused defines?

It'll be used in cmdq_sec_insert_backup_cookie() at [PATCH 10/15].
Should I merge this patch into [PATCH 10/15]?

Regards,
Jason-JH.Lin

> 
> Best regards,
> Krzysztof
> 
>
Krzysztof Kozlowski Sept. 25, 2023, 6:42 a.m. UTC | #3
On 25/09/2023 07:08, Jason-JH Lin (林睿祥) wrote:
> Hi Krzysztof,
> 
> Thanks for the reviews.
> 
> On Sat, 2023-09-23 at 20:02 +0200, Krzysztof Kozlowski wrote:
>>  	 
>> External email : Please do not click links or open attachments until
>> you have verified the sender or the content.
>>  On 18/09/2023 21:21, Jason-JH.Lin wrote:
>>> GCE has specific purpose registers, abbreviated as SPR.
>>> Client can us SPR to store data or programs.
>>>
>>> In CMDQ driver, it allows client to STORE or LOAD data into SPR.
>>> The value stored in SPR will be cleared after reset GCE HW thread.
>>>
>>> There are 4 SPR (register index 0 - 3) in every GCE HW thread.
>>> SPR is thread-independent and HW secure protected.
>>>
>>> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
>>> ---
>>>  include/linux/soc/mediatek/mtk-cmdq.h | 5 +++++
>>
>> There is no user of this... Why do you add unused defines?
> 
> It'll be used in cmdq_sec_insert_backup_cookie() at [PATCH 10/15].
> Should I merge this patch into [PATCH 10/15]?

Yes, because what is the purpose of adding unused defines? I asked
before and did not get answer...

Best regards,
Krzysztof
Jason-JH Lin (林睿祥) Sept. 25, 2023, 10:24 a.m. UTC | #4
On Mon, 2023-09-25 at 08:42 +0200, Krzysztof Kozlowski wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  On 25/09/2023 07:08, Jason-JH Lin (林睿祥) wrote:
> > Hi Krzysztof,
> > 
> > Thanks for the reviews.
> > 
> > On Sat, 2023-09-23 at 20:02 +0200, Krzysztof Kozlowski wrote:
> >>   
> >> External email : Please do not click links or open attachments
> until
> >> you have verified the sender or the content.
> >>  On 18/09/2023 21:21, Jason-JH.Lin wrote:
> >>> GCE has specific purpose registers, abbreviated as SPR.
> >>> Client can us SPR to store data or programs.
> >>>
> >>> In CMDQ driver, it allows client to STORE or LOAD data into SPR.
> >>> The value stored in SPR will be cleared after reset GCE HW
> thread.
> >>>
> >>> There are 4 SPR (register index 0 - 3) in every GCE HW thread.
> >>> SPR is thread-independent and HW secure protected.
> >>>
> >>> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> >>> ---
> >>>  include/linux/soc/mediatek/mtk-cmdq.h | 5 +++++
> >>
> >> There is no user of this... Why do you add unused defines?
> > 
> > It'll be used in cmdq_sec_insert_backup_cookie() at [PATCH 10/15].
> > Should I merge this patch into [PATCH 10/15]?
> 
> Yes, because what is the purpose of adding unused defines? I asked
> before and did not get answer...
> 

I'm totally agree with merging this patch to the usage parts of mtk-
cmdq-sec-mailbox.c.

But I have no idea why mtk-cmdq-sec-mailbox.c and mtk-cmdq-mailbox.c
are not placed in the same maintainer's tree as mtk-cmdq.h and mtk-
cmdq-helper.c, so I just separate them to different patch by tree like
the requirement from previous sent series.

I will re-organized this series to make the definition and the usage of
the code in the same patch.

Regards,
Jason-JH.Lin

> Best regards,
> Krzysztof
> 
>
diff mbox series

Patch

diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
index 649955d2cf5c..f49ca8bd58e8 100644
--- a/include/linux/soc/mediatek/mtk-cmdq.h
+++ b/include/linux/soc/mediatek/mtk-cmdq.h
@@ -11,6 +11,11 @@ 
 #include <linux/mailbox/mtk-cmdq-mailbox.h>
 #include <linux/timer.h>
 
+#define CMDQ_THR_SPR_IDX0		0
+#define CMDQ_THR_SPR_IDX1		1
+#define CMDQ_THR_SPR_IDX2		2
+#define CMDQ_THR_SPR_IDX3		3
+
 #define CMDQ_ADDR_HIGH(addr)	((u32)(((addr) >> 16) & GENMASK(31, 0)))
 #define CMDQ_ADDR_LOW(addr)	((u16)(addr) | BIT(1))