From patchwork Thu Sep 21 20:03:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 13394466 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23B3FE7D0A7 for ; Thu, 21 Sep 2023 20:03:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B01410E613; Thu, 21 Sep 2023 20:03:18 +0000 (UTC) Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4D97D10E613 for ; Thu, 21 Sep 2023 20:03:15 +0000 (UTC) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1qjPtI-0000PI-U5; Thu, 21 Sep 2023 22:03:12 +0200 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1qjPtI-00804q-FX; Thu, 21 Sep 2023 22:03:12 +0200 From: Lucas Stach To: Marek Vasut , Liu Ying Subject: [PATCH v2 5/6] drm: lcdif: move pitch setup to plane atomic update Date: Thu, 21 Sep 2023 22:03:11 +0200 Message-Id: <20230921200312.3989073-5-l.stach@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230921200312.3989073-1-l.stach@pengutronix.de> References: <20230921200312.3989073-1-l.stach@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, NXP Linux Team , Pengutronix Kernel Team , patchwork-lst@pengutronix.de Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The buffer pitch may change when switching the buffer on a atomic update. As the register is double buffered it can be safely changed while the display is active. Signed-off-by: Lucas Stach Reviewed-by: Marek Vasut --- v2: no changes --- drivers/gpu/drm/mxsfb/lcdif_kms.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdif_kms.c index 4e9284b0d12e..daf54ff2b7bd 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_kms.c +++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c @@ -327,19 +327,6 @@ static void lcdif_set_mode(struct lcdif_drm_private *lcdif, u32 bus_flags) writel(CTRLDESCL0_1_HEIGHT(m->vdisplay) | CTRLDESCL0_1_WIDTH(m->hdisplay), lcdif->base + LCDC_V8_CTRLDESCL0_1); - - /* - * The P_SIZE and T_SIZE bitfields are only documented in the - * downstream driver. Those bitfields control the AXI burst size. - * As of now there are two known values: - * 1 - 128Byte - * 2 - 256Byte - * Downstream sets this to 256B burst size to improve the memory access - * efficiency so set it here too. - */ - ctrl = CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) | - CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]); - writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3); } static void lcdif_enable_controller(struct lcdif_drm_private *lcdif) @@ -694,6 +681,19 @@ static void lcdif_plane_primary_atomic_update(struct drm_plane *plane, writel(CTRLDESCL_HIGH0_4_ADDR_HIGH(upper_32_bits(paddr)), lcdif->base + LCDC_V8_CTRLDESCL_HIGH0_4); } + + /* + * The P_SIZE and T_SIZE bitfields are only documented in the + * downstream driver. Those bitfields control the AXI burst size. + * As of now there are two known values: + * 1 - 128Byte + * 2 - 256Byte + * Downstream sets this to 256B burst size to improve the memory access + * efficiency so set it here too. + */ + writel(CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) | + CTRLDESCL0_3_PITCH(new_pstate->fb->pitches[0]), + lcdif->base + LCDC_V8_CTRLDESCL0_3); } static bool lcdif_format_mod_supported(struct drm_plane *plane,