From patchwork Fri Sep 29 07:13:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13403796 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D4242E743F4 for ; Fri, 29 Sep 2023 08:18:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A9F110E6F3; Fri, 29 Sep 2023 08:17:53 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id EAD1110E6CE; Fri, 29 Sep 2023 08:17:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695975469; x=1727511469; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ywo0ojaODUwSXjv1Nly29gbYknaGO2Bih2R1esaOhbs=; b=fIkj8tTggD6FMYkOqE5QwLhaCArcFSSvjPeFn8HJEANVLFVb3hxT/PHd c9ymxU2VnE42b/8wv9MOKDCsS4KESdATY5nN95dMYN8Ah/tCS8aXe1QWr mI3EQkWPIWxjv59ezdhknj4wDUYlutBC14Fxvl3nbTyRj0awaAN1RVKD2 bvLOPCBmV/csBaBA6vgjpHCGMRX24cHEMF1M+JzozUjkT8JFKbBezF9mj wUuFBZxoQreijdQQCc7+1TOJJb8pO7tf6Au8D6HrNDTSNrqbpalEsfDCl E1Or+15OtIZJJSEKwi67u4W48pdB6n+OLRKgOQQaP/AL2zw+4HksDBulC A==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="379520314" X-IronPort-AV: E=Sophos;i="6.03,186,1694761200"; d="scan'208";a="379520314" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2023 00:19:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="815517461" X-IronPort-AV: E=Sophos;i="6.03,186,1694761200"; d="scan'208";a="815517461" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmsmga008.fm.intel.com with ESMTP; 29 Sep 2023 00:19:28 -0700 From: Mitul Golani To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 8/8] drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfs Date: Fri, 29 Sep 2023 12:43:22 +0530 Message-Id: <20230929071322.945521-9-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230929071322.945521-1-mitulkumar.ajitkumar.golani@intel.com> References: <20230929071322.945521-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suraj.kandpal@intel.com, suijingfeng@loongson.cn, jani.nikula@intel.com, swati2.sharma@intel.com, mripard@kernel.org, ankit.k.nautiyal@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Swati Sharma If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff compressed bpp is fractional. Continue if the computed compressed bpp turns out to be a integer. v2: -Use helpers for fractional, integral bits of bits_per_pixel. (Suraj) -Fix comment (Suraj) Signed-off-by: Swati Sharma Reviewed-by: Suraj Kandpal Reviewed-by: Sui Jingfeng --- drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index bc4ea1c21562..a9e1a89a2804 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1908,6 +1908,9 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp, for (compressed_bppx16 = dsc_max_bpp; compressed_bppx16 >= dsc_min_bpp; compressed_bppx16 -= bppx16_step) { + if (intel_dp->force_dsc_fractional_bpp_en && + !intel_fractional_bpp_decimal(compressed_bppx16)) + continue; ret = dsc_compute_link_config(intel_dp, pipe_config, limits, @@ -1915,6 +1918,10 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp, timeslots); if (ret == 0) { pipe_config->dsc.compressed_bpp_x16 = compressed_bppx16; + if (intel_dp->force_dsc_fractional_bpp_en && + intel_fractional_bpp_decimal(compressed_bppx16)) + drm_dbg_kms(&i915->drm, "Forcing DSC fractional bpp\n"); + return 0; } }