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Wed, 11 Oct 2023 04:59:32 -0700 (PDT) From: Neil Armstrong Date: Wed, 11 Oct 2023 13:59:21 +0200 Subject: [PATCH v2 1/5] drm/msm/dpu: create a dpu_hw_clk_force_ctrl() helper MIME-Version: 1.0 Message-Id: <20231011-topic-sm8550-graphics-sspp-split-clk-v2-1-b219c945df53@linaro.org> References: <20231011-topic-sm8550-graphics-sspp-split-clk-v2-0-b219c945df53@linaro.org> In-Reply-To: <20231011-topic-sm8550-graphics-sspp-split-clk-v2-0-b219c945df53@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3100; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=A/G3MVO3WfKh+AqmbjQ5ogAUwEdsxecl9VHw880vMMU=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlJo4hP9v16iv5MviNHP9TcD7Agb3W8eAPlpNIlMod o0b1dQ2JAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZSaOIQAKCRB33NvayMhJ0bInD/ 9Ly1iAVJsLt2ZkqG5V1mRJXRvDzonNt7DX48LRCklfUv+oPTCQS6bmla3/BtEVaUoNAiRegsrwyyrP 2PCCZbsDSlh9nhbi/mvFYGQsi8w7UVD8LBHFmMkoltHeNSxOwYRHxZ+0xYXEvugvXNTuJGy0bnefuQ EP1DPaSSJVhGyMOZx7ObinDoYv3OOJCN+0gJVS3xjlXOH3+GhYmSn4OBQ9OtM/MErLhMOD1yBOLsv4 rol+TzfIxvaCZ5whloEcB5vB/pcz617DsqSGYg2E9b3KOtvC2r38ekUxKP1Dm9T21oN7wEWQGFmDeT f3xhQrmehAAqmHtHwy1oXZWW2vM0EvPH0JYyPX379ae0clAVHnRk6tOfzzXw70uNWpcaE9qo7w3TCm h91vLSE6mJ7Ti8x53gbhIoSNLCKcffX7fmNsDmc45ipcj4+PYh7YtxdgfdYCM5s9ZUbSE5voLAU8u/ tVXFjdnbQRb+0gvjH7ocm8H9xymrbyuYOzix81zYre52d345B1UIF0TgtJYNAczfvI3Ljhpa0zvwEd BKCD6XpxZVTUP8DOWrf/fWmbcYN4N7VU0gJr65HyKBKTswvWsC4gJvo2DDTHPFkNzDSEZfB2kod9PI DFY83Z651z48F154XzjKXfdaHfc5vA3jLrzmFZzw/IeFJTOni1oR691fhDag== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Neil Armstrong Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add an helper to setup the force clock control as it will be used in multiple HW files. Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 23 +---------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 21 +++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 4 ++++ 3 files changed, 26 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c index cff48763ce25..24e734768a72 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c @@ -66,34 +66,13 @@ static void dpu_hw_setup_split_pipe(struct dpu_hw_mdp *mdp, static bool dpu_hw_setup_clk_force_ctrl(struct dpu_hw_mdp *mdp, enum dpu_clk_ctrl_type clk_ctrl, bool enable) { - struct dpu_hw_blk_reg_map *c; - u32 reg_off, bit_off; - u32 reg_val, new_val; - bool clk_forced_on; - if (!mdp) return false; - c = &mdp->hw; - if (clk_ctrl <= DPU_CLK_CTRL_NONE || clk_ctrl >= DPU_CLK_CTRL_MAX) return false; - reg_off = mdp->caps->clk_ctrls[clk_ctrl].reg_off; - bit_off = mdp->caps->clk_ctrls[clk_ctrl].bit_off; - - reg_val = DPU_REG_READ(c, reg_off); - - if (enable) - new_val = reg_val | BIT(bit_off); - else - new_val = reg_val & ~BIT(bit_off); - - DPU_REG_WRITE(c, reg_off, new_val); - - clk_forced_on = !(reg_val & BIT(bit_off)); - - return clk_forced_on; + return dpu_hw_clk_force_ctrl(&mdp->hw, &mdp->caps->clk_ctrls[clk_ctrl], enable); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c index 9d2273fd2fed..18b16b2d2bf5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c @@ -546,3 +546,24 @@ void dpu_setup_cdp(struct dpu_hw_blk_reg_map *c, u32 offset, DPU_REG_WRITE(c, offset, cdp_cntl); } + +bool dpu_hw_clk_force_ctrl(struct dpu_hw_blk_reg_map *c, + const struct dpu_clk_ctrl_reg *clk_ctrl_reg, + bool enable) +{ + u32 reg_val, new_val; + bool clk_forced_on; + + reg_val = DPU_REG_READ(c, clk_ctrl_reg->reg_off); + + if (enable) + new_val = reg_val | BIT(clk_ctrl_reg->bit_off); + else + new_val = reg_val & ~BIT(clk_ctrl_reg->bit_off); + + DPU_REG_WRITE(c, clk_ctrl_reg->reg_off, new_val); + + clk_forced_on = !(reg_val & BIT(clk_ctrl_reg->bit_off)); + + return clk_forced_on; +} diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h index 1f6079f47071..4bea139081bc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h @@ -367,4 +367,8 @@ int dpu_hw_collect_misr(struct dpu_hw_blk_reg_map *c, u32 misr_signature_offset, u32 *misr_value); +bool dpu_hw_clk_force_ctrl(struct dpu_hw_blk_reg_map *c, + const struct dpu_clk_ctrl_reg *clk_ctrl_reg, + bool enable); + #endif /* _DPU_HW_UTIL_H */