| Message ID | 20231125-topic-rb1_feat-v1-6-11d71b12b058@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | RB1/QCM2290 features | expand |
On 25/11/2023 15:17, Konrad Dybcio wrote: > Every Qualcomm SoC physically has a "CRYPTO0<->DDR" interconnect lane. > Allow this property to be present, no matter the SoC. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml index 0613a37a851a..f3a87a8426d0 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -178,21 +178,6 @@ allOf: minItems: 3 maxItems: 3 - # Interconnects - - if: - not: - properties: - compatible: - contains: - enum: - - qcom,scm-qdu1000 - - qcom,scm-sc8280xp - - qcom,scm-sm8450 - - qcom,scm-sm8550 - then: - properties: - interconnects: false - # Interrupts - if: not:
Every Qualcomm SoC physically has a "CRYPTO0<->DDR" interconnect lane. Allow this property to be present, no matter the SoC. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 15 --------------- 1 file changed, 15 deletions(-)