From patchwork Sun Nov 26 17:18:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 13468896 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59487C4167B for ; Sun, 26 Nov 2023 17:19:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7274F10E136; Sun, 26 Nov 2023 17:19:23 +0000 (UTC) Received: from mail5.25mail.st (mail5.25mail.st [74.50.62.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6F14710E138 for ; Sun, 26 Nov 2023 17:19:21 +0000 (UTC) Received: from localhost (91-158-86-216.elisa-laajakaista.fi [91.158.86.216]) by mail5.25mail.st (Postfix) with ESMTPSA id 894AA60479; Sun, 26 Nov 2023 17:18:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=atomide.com; s=25mailst; t=1701019160; bh=Yi4nE9OmTsFagLEE5vj6YKCJ5nsTaUEbxvbympjRX3k=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=XVTNgv3ElKZu0YZB3dm19Jz+9FI9cI0PM9gtu651eE/WOg8Vau2jHgTxbpXeu3mFT noyWvXrA0QyiL/MiyYLtIsHfUO+aSCZ0ui2ML7hs83J1uaMnqava4knjozc8daBJ/u 6FwvbtH/dNk2Cf24RvWIDf8j8WomvAWIJl4jcxqw2sdkHlq3mDm5Sh1DxKN9MRYvRX cWrACrSAwQ40vHdjkcdOzEf4HGSjt8rRWs27Pju6Hv3qrsrOMvZ3l0YNzcy8fexVxl w/SFo4hwFgrRfF+ylxjVzfuJdqbVbApeuW/bWqvyaShMAjFQJIqDJ5jnf4rjOp1xZz MVCjPiPv7khGA== Date: Sun, 26 Nov 2023 19:18:37 +0200 From: Tony Lindgren To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Sam Ravnborg , Vinay Simha BN Subject: [PATCH 3/6] drm/bridge: tc358775: Add jeida-24 support Message-ID: <20231126171837.GK5169@atomide.com> References: <20231126163247.10131-1-tony@atomide.com> <20231126163247.10131-2-tony@atomide.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231126163247.10131-2-tony@atomide.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Carl Philipp Klemm , devicetree@vger.kernel.org, Ivaylo Dimitrov , Merlijn Wajer , Sebastian Reichel , dri-devel@lists.freedesktop.org, Pavel Machek Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The jeida-24 register values are the default hardware settings, but they not listed in the driver. Let's add them. Signed-off-by: Tony Lindgren Signed-off-by: Michael Walle Tested-by: Tony Lindgren --- drivers/gpu/drm/bridge/tc358775.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c --- a/drivers/gpu/drm/bridge/tc358775.c +++ b/drivers/gpu/drm/bridge/tc358775.c @@ -458,8 +458,18 @@ static void tc_bridge_enable(struct drm_bridge *bridge) * Default hardware register settings of tc358775 configured * with MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA jeida-24 format */ - if (connector->display_info.bus_formats[0] == - MEDIA_BUS_FMT_RGB888_1X7X4_SPWG) { + switch (connector->display_info.bus_formats[0]) { + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: + /* JEIDA-24 */ + d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R2, LVI_R3, LVI_R4, LVI_R5)); + d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R6, LVI_R1, LVI_R7, LVI_G2)); + d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G3, LVI_G4, LVI_G0, LVI_G1)); + d2l_write(tc->i2c, LV_MX1215, LV_MX(LVI_G5, LVI_G6, LVI_G7, LVI_B2)); + d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_B0, LVI_B1, LVI_B3, LVI_B4)); + d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B5, LVI_B6, LVI_B7, LVI_L0)); + d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R0)); + break; + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG: /* VESA-24 */ d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3)); d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_R7, LVI_R5, LVI_G0)); @@ -468,7 +478,9 @@ static void tc_bridge_enable(struct drm_bridge *bridge) d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_B6, LVI_B7, LVI_B1, LVI_B2)); d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0)); d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_R6)); - } else { /* MEDIA_BUS_FMT_RGB666_1X7X3_SPWG - JEIDA-18 */ + break; + case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: + /* JEIDA-18 */ d2l_write(tc->i2c, LV_MX0003, LV_MX(LVI_R0, LVI_R1, LVI_R2, LVI_R3)); d2l_write(tc->i2c, LV_MX0407, LV_MX(LVI_R4, LVI_L0, LVI_R5, LVI_G0)); d2l_write(tc->i2c, LV_MX0811, LV_MX(LVI_G1, LVI_G2, LVI_L0, LVI_L0)); @@ -476,6 +488,9 @@ static void tc_bridge_enable(struct drm_bridge *bridge) d2l_write(tc->i2c, LV_MX1619, LV_MX(LVI_L0, LVI_L0, LVI_B1, LVI_B2)); d2l_write(tc->i2c, LV_MX2023, LV_MX(LVI_B3, LVI_B4, LVI_B5, LVI_L0)); d2l_write(tc->i2c, LV_MX2427, LV_MX(LVI_HS, LVI_VS, LVI_DE, LVI_L0)); + break; + default: + break; } d2l_write(tc->i2c, VFUEN, VFUEN_EN);