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[5.90.63.69]) by smtp.gmail.com with ESMTPSA id l39-20020a05600c1d2700b0040e50d82af5sm15536120wms.32.2024.01.15.02.34.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jan 2024 02:34:24 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Subject: [RESEND PATCH v9 2/2] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Date: Mon, 15 Jan 2024 11:33:48 +0100 Message-ID: <20240115103416.978481-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240115103416.978481-1-dario.binacchi@amarulasolutions.com> References: <20240115103416.978481-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxime Ripard , Neil Armstrong , Dario Binacchi , Robert Foss , Andrzej Hajda , Thomas Zimmermann , Jonas Karlman , Amarula patchwork , dri-devel@lists.freedesktop.org, Jernej Skrabec , Jagan Teki , Marek Szyprowski , michael@amarulasolutions.com, David Airlie , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The patch completes the setting of CLKLANE_STOP for the imx8m{m,n,p} platforms (i. e. not exynos). Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v9: - Updated commit message - Drop [3/3] arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup because applied. Changes in v8: - Move the 'status' property to the end of the list of nodes: - pwm1 - lcdif - mipi_dsi - Add a newline between properties and child node (mipi_dsi_out). - Sort the iomuxc node alphabetically - Rename pwm1grp to blgrp Changes in v7: - Drop [3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller because applied. Changes in v6: - Drop patches: - [06/10] drm/panel: Add Synaptics R63353 panel driver - [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller - [08/10] drm/panel: Add Ilitek ILI9805 panel driver - [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) Drop patches: - [01/10] drm/bridge: Fix bridge disable logic - [02/10] drm/bridge: Fix a use case in the bridge disable logic Because they are wrong Changes in v3: - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller. Changes in v2: - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 15bf05b2bbe4..13f181c99d7e 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -96,6 +96,7 @@ #define DSIM_MFLUSH_VS BIT(29) /* This flag is valid only for exynos3250/3472/5260/5430 */ #define DSIM_CLKLANE_STOP BIT(30) +#define DSIM_NON_CONTINUOUS_CLKLANE BIT(31) /* DSIM_ESCMODE */ #define DSIM_TX_TRIGGER_RST BIT(4) @@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi) * power consumption. */ if (driver_data->has_clklane_stop && - dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) + dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { + if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) + reg |= DSIM_NON_CONTINUOUS_CLKLANE; + reg |= DSIM_CLKLANE_STOP; + } samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg); lanes_mask = BIT(dsi->lanes) - 1;