diff mbox series

[14/19] drm/i915/dp: Compute DP tunel BW during encoder state computation

Message ID 20240123102850.390126-15-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Add Display Port tunnel BW allocation support | expand

Commit Message

Imre Deak Jan. 23, 2024, 10:28 a.m. UTC
Compute the BW required through a DP tunnel on links with such tunnels
detected and add the corresponding atomic state during a modeset.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 16 +++++++++++++---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 +++++++++++++
 2 files changed, 26 insertions(+), 3 deletions(-)

Comments

Shankar, Uma Feb. 6, 2024, 8:44 p.m. UTC | #1
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Tuesday, January 23, 2024 3:59 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Subject: [PATCH 14/19] drm/i915/dp: Compute DP tunel BW during encoder state
> computation
> 
> Compute the BW required through a DP tunnel on links with such tunnels
> detected and add the corresponding atomic state during a modeset.

Looks good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     | 16 +++++++++++++---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 +++++++++++++
>  2 files changed, 26 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 78dfe8be6031d..6968fdb7ffcdf 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2880,6 +2880,7 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
>  			struct drm_connector_state *conn_state)  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_atomic_state *state =
> +to_intel_atomic_state(conn_state->state);
>  	struct drm_display_mode *adjusted_mode = &pipe_config-
> >hw.adjusted_mode;
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	const struct drm_display_mode *fixed_mode; @@ -2980,6 +2981,9 @@
> intel_dp_compute_config(struct intel_encoder *encoder,
>  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
>  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config,
> conn_state);
> 
> +	intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
> +						 pipe_config);
> +
>  	return 0;
>  }
> 
> @@ -6087,6 +6091,15 @@ static int intel_dp_connector_atomic_check(struct
> drm_connector *conn,
>  			return ret;
>  	}
> 
> +	if (!intel_connector_needs_modeset(state, conn))
> +		return 0;
> +
> +	ret = intel_dp_tunnel_atomic_check_state(state,
> +						 intel_dp,
> +						 intel_conn);
> +	if (ret)
> +		return ret;
> +
>  	/*
>  	 * We don't enable port sync on BDW due to missing w/as and
>  	 * due to not having adjusted the modeset sequence appropriately.
> @@ -6094,9 +6107,6 @@ static int intel_dp_connector_atomic_check(struct
> drm_connector *conn,
>  	if (DISPLAY_VER(dev_priv) < 9)
>  		return 0;
> 
> -	if (!intel_connector_needs_modeset(state, conn))
> -		return 0;
> -
>  	if (conn->has_tile) {
>  		ret = intel_modeset_tile_group(state, conn->tile_group->id);
>  		if (ret)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 520393dc8b453..cbfab3173b9ef 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -42,6 +42,7 @@
>  #include "intel_dp.h"
>  #include "intel_dp_hdcp.h"
>  #include "intel_dp_mst.h"
> +#include "intel_dp_tunnel.h"
>  #include "intel_dpio_phy.h"
>  #include "intel_hdcp.h"
>  #include "intel_hotplug.h"
> @@ -523,6 +524,7 @@ static int intel_dp_mst_compute_config(struct
> intel_encoder *encoder,
>  				       struct drm_connector_state *conn_state)  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_atomic_state *state =
> +to_intel_atomic_state(conn_state->state);
>  	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
>  	struct intel_dp *intel_dp = &intel_mst->primary->dp;
>  	const struct intel_connector *connector = @@ -619,6 +621,9 @@ static
> int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> 
>  	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> 
> +	intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
> +						 pipe_config);
> +
>  	return 0;
>  }
> 
> @@ -876,6 +881,14 @@ intel_dp_mst_atomic_check(struct drm_connector
> *connector,
>  	if (ret)
>  		return ret;
> 
> +	if (intel_connector_needs_modeset(state, connector)) {
> +		ret = intel_dp_tunnel_atomic_check_state(state,
> +							 intel_connector-
> >mst_port,
> +							 intel_connector);
> +		if (ret)
> +			return ret;
> +	}
> +
>  	return drm_dp_atomic_release_time_slots(&state->base,
>  						&intel_connector->mst_port-
> >mst_mgr,
>  						intel_connector->port);
> --
> 2.39.2
Ville Syrjälä Feb. 6, 2024, 11:25 p.m. UTC | #2
On Tue, Jan 23, 2024 at 12:28:45PM +0200, Imre Deak wrote:
> Compute the BW required through a DP tunnel on links with such tunnels
> detected and add the corresponding atomic state during a modeset.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     | 16 +++++++++++++---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 +++++++++++++
>  2 files changed, 26 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 78dfe8be6031d..6968fdb7ffcdf 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2880,6 +2880,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  			struct drm_connector_state *conn_state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
>  	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	const struct drm_display_mode *fixed_mode;
> @@ -2980,6 +2981,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
>  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
>  
> +	intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
> +						 pipe_config);

Error handling seems awol?

> +
>  	return 0;
>  }
>  
> @@ -6087,6 +6091,15 @@ static int intel_dp_connector_atomic_check(struct drm_connector *conn,
>  			return ret;
>  	}
>  
> +	if (!intel_connector_needs_modeset(state, conn))
> +		return 0;
> +
> +	ret = intel_dp_tunnel_atomic_check_state(state,
> +						 intel_dp,
> +						 intel_conn);
> +	if (ret)
> +		return ret;
> +
>  	/*
>  	 * We don't enable port sync on BDW due to missing w/as and
>  	 * due to not having adjusted the modeset sequence appropriately.
> @@ -6094,9 +6107,6 @@ static int intel_dp_connector_atomic_check(struct drm_connector *conn,
>  	if (DISPLAY_VER(dev_priv) < 9)
>  		return 0;
>  
> -	if (!intel_connector_needs_modeset(state, conn))
> -		return 0;
> -
>  	if (conn->has_tile) {
>  		ret = intel_modeset_tile_group(state, conn->tile_group->id);
>  		if (ret)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 520393dc8b453..cbfab3173b9ef 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -42,6 +42,7 @@
>  #include "intel_dp.h"
>  #include "intel_dp_hdcp.h"
>  #include "intel_dp_mst.h"
> +#include "intel_dp_tunnel.h"
>  #include "intel_dpio_phy.h"
>  #include "intel_hdcp.h"
>  #include "intel_hotplug.h"
> @@ -523,6 +524,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  				       struct drm_connector_state *conn_state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
>  	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
>  	struct intel_dp *intel_dp = &intel_mst->primary->dp;
>  	const struct intel_connector *connector =
> @@ -619,6 +621,9 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
>  
>  	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
>  
> +	intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
> +						 pipe_config);
> +
>  	return 0;
>  }
>  
> @@ -876,6 +881,14 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
>  	if (ret)
>  		return ret;
>  
> +	if (intel_connector_needs_modeset(state, connector)) {
> +		ret = intel_dp_tunnel_atomic_check_state(state,
> +							 intel_connector->mst_port,
> +							 intel_connector);
> +		if (ret)
> +			return ret;
> +	}
> +
>  	return drm_dp_atomic_release_time_slots(&state->base,
>  						&intel_connector->mst_port->mst_mgr,
>  						intel_connector->port);
> -- 
> 2.39.2
Imre Deak Feb. 7, 2024, 2:25 p.m. UTC | #3
On Wed, Feb 07, 2024 at 01:25:19AM +0200, Ville Syrjälä wrote:
> On Tue, Jan 23, 2024 at 12:28:45PM +0200, Imre Deak wrote:
> > Compute the BW required through a DP tunnel on links with such tunnels
> > detected and add the corresponding atomic state during a modeset.
> > 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp.c     | 16 +++++++++++++---
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 +++++++++++++
> >  2 files changed, 26 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 78dfe8be6031d..6968fdb7ffcdf 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2880,6 +2880,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >  			struct drm_connector_state *conn_state)
> >  {
> >  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > +	struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
> >  	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
> >  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> >  	const struct drm_display_mode *fixed_mode;
> > @@ -2980,6 +2981,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> >  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
> >  
> > +	intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
> > +						 pipe_config);
> 
> Error handling seems awol?

Yes, along with checking the return from
drm_dp_tunnel_atomic_set_stream_bw(), thanks for spotting this.

> 
> > +
> >  	return 0;
> >  }
> >  
> > @@ -6087,6 +6091,15 @@ static int intel_dp_connector_atomic_check(struct drm_connector *conn,
> >  			return ret;
> >  	}
> >  
> > +	if (!intel_connector_needs_modeset(state, conn))
> > +		return 0;
> > +
> > +	ret = intel_dp_tunnel_atomic_check_state(state,
> > +						 intel_dp,
> > +						 intel_conn);
> > +	if (ret)
> > +		return ret;
> > +
> >  	/*
> >  	 * We don't enable port sync on BDW due to missing w/as and
> >  	 * due to not having adjusted the modeset sequence appropriately.
> > @@ -6094,9 +6107,6 @@ static int intel_dp_connector_atomic_check(struct drm_connector *conn,
> >  	if (DISPLAY_VER(dev_priv) < 9)
> >  		return 0;
> >  
> > -	if (!intel_connector_needs_modeset(state, conn))
> > -		return 0;
> > -
> >  	if (conn->has_tile) {
> >  		ret = intel_modeset_tile_group(state, conn->tile_group->id);
> >  		if (ret)
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index 520393dc8b453..cbfab3173b9ef 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -42,6 +42,7 @@
> >  #include "intel_dp.h"
> >  #include "intel_dp_hdcp.h"
> >  #include "intel_dp_mst.h"
> > +#include "intel_dp_tunnel.h"
> >  #include "intel_dpio_phy.h"
> >  #include "intel_hdcp.h"
> >  #include "intel_hotplug.h"
> > @@ -523,6 +524,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> >  				       struct drm_connector_state *conn_state)
> >  {
> >  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > +	struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
> >  	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> >  	struct intel_dp *intel_dp = &intel_mst->primary->dp;
> >  	const struct intel_connector *connector =
> > @@ -619,6 +621,9 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> >  
> >  	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> >  
> > +	intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
> > +						 pipe_config);
> > +
> >  	return 0;
> >  }
> >  
> > @@ -876,6 +881,14 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
> >  	if (ret)
> >  		return ret;
> >  
> > +	if (intel_connector_needs_modeset(state, connector)) {
> > +		ret = intel_dp_tunnel_atomic_check_state(state,
> > +							 intel_connector->mst_port,
> > +							 intel_connector);
> > +		if (ret)
> > +			return ret;
> > +	}
> > +
> >  	return drm_dp_atomic_release_time_slots(&state->base,
> >  						&intel_connector->mst_port->mst_mgr,
> >  						intel_connector->port);
> > -- 
> > 2.39.2
> 
> -- 
> Ville Syrjälä
> Intel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 78dfe8be6031d..6968fdb7ffcdf 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2880,6 +2880,7 @@  intel_dp_compute_config(struct intel_encoder *encoder,
 			struct drm_connector_state *conn_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
 	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	const struct drm_display_mode *fixed_mode;
@@ -2980,6 +2981,9 @@  intel_dp_compute_config(struct intel_encoder *encoder,
 	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
 	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
 
+	intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
+						 pipe_config);
+
 	return 0;
 }
 
@@ -6087,6 +6091,15 @@  static int intel_dp_connector_atomic_check(struct drm_connector *conn,
 			return ret;
 	}
 
+	if (!intel_connector_needs_modeset(state, conn))
+		return 0;
+
+	ret = intel_dp_tunnel_atomic_check_state(state,
+						 intel_dp,
+						 intel_conn);
+	if (ret)
+		return ret;
+
 	/*
 	 * We don't enable port sync on BDW due to missing w/as and
 	 * due to not having adjusted the modeset sequence appropriately.
@@ -6094,9 +6107,6 @@  static int intel_dp_connector_atomic_check(struct drm_connector *conn,
 	if (DISPLAY_VER(dev_priv) < 9)
 		return 0;
 
-	if (!intel_connector_needs_modeset(state, conn))
-		return 0;
-
 	if (conn->has_tile) {
 		ret = intel_modeset_tile_group(state, conn->tile_group->id);
 		if (ret)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 520393dc8b453..cbfab3173b9ef 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -42,6 +42,7 @@ 
 #include "intel_dp.h"
 #include "intel_dp_hdcp.h"
 #include "intel_dp_mst.h"
+#include "intel_dp_tunnel.h"
 #include "intel_dpio_phy.h"
 #include "intel_hdcp.h"
 #include "intel_hotplug.h"
@@ -523,6 +524,7 @@  static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 				       struct drm_connector_state *conn_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
 	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 	struct intel_dp *intel_dp = &intel_mst->primary->dp;
 	const struct intel_connector *connector =
@@ -619,6 +621,9 @@  static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 
 	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
 
+	intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
+						 pipe_config);
+
 	return 0;
 }
 
@@ -876,6 +881,14 @@  intel_dp_mst_atomic_check(struct drm_connector *connector,
 	if (ret)
 		return ret;
 
+	if (intel_connector_needs_modeset(state, connector)) {
+		ret = intel_dp_tunnel_atomic_check_state(state,
+							 intel_connector->mst_port,
+							 intel_connector);
+		if (ret)
+			return ret;
+	}
+
 	return drm_dp_atomic_release_time_slots(&state->base,
 						&intel_connector->mst_port->mst_mgr,
 						intel_connector->port);