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Mon, 26 Feb 2024 15:11:29 -0600 Received: from localhost.localdomain (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 26 Feb 2024 15:11:28 -0600 From: Harry Wentland To: , CC: , Harry Wentland Subject: [RFC PATCH v4 37/42] drm/amd/display: Add support for BT.709 and BT.2020 TFs Date: Mon, 26 Feb 2024 16:10:51 -0500 Message-ID: <20240226211100.100108-38-harry.wentland@amd.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240226211100.100108-1-harry.wentland@amd.com> References: <20240226211100.100108-1-harry.wentland@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF0000343D:EE_|DM8PR12MB5429:EE_ X-MS-Office365-Filtering-Correlation-Id: 451cdbca-11e4-4295-6c57-08dc370f826c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Qofqmx1P4dQxGOR48yXGv+7umaWdjpI30e/b8331KXjqVgYGREX8ticOXpRZhtd7XYdxBJLbDB/7aigog4E5Uh7nvQZJ2VQrXUGgVyl5MSLKV3t+pG+TXtIc++gzJQzzMNWlkBht01OzzqGThiLEU0/ryyh3O3Mbo7XQd+fsr3yrR1pYA9heOjlQF8/tc9RP8oJ/1TEmBCIXO990UI489CPXzFitR4LsUqeG9nmcNlwsvWnucs7Bvy1akIGc145yvvoJ/cDNkAF54FxC4QYz/qVkKc9yR4GDfnowX0zykIsqGkiwQ0JPiIBixPcIl+BNcb5FDxFT03DYIXIeI1On99w9cPmGYF3BuE7lp+O6kCmYxNjCvFdKoGx+Tj25bgS2Lu7Tk8glOKeB/8SL9V2OuPtdGtFUYSyqI4MVxdqMeBGu5w8CXPRZMd3ZS28nYvY7Xt7Ew2BOoGnYZy9PK7o93/09pexXpDFdRpKYhCbSMbGoIBUV651luNmd/93OMhXFRNV9qEDgwF6FHeRvVT+5Euj8wx31CbsjvbnACyFLzB7MKnajCqR1EESx6VK06s3lGYCt9deDr7T/K/IpJGwNcSV2Nv8e4OhNtdCAj9QOloi+/NSYqCk76o82nTqPmRd9GLiQ28y71jtXpESyvuHVO2ijRIaNiYZjkvtvatM2bY9GOZyhfyx3PqVtHPJhdpFSSEoSsiY9h4wHg5C0WtGqAoYmydtn5bgLb7PNfO4mYgvNUUPlS0n0360qaa21d3L+ X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2024 21:11:33.1011 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 451cdbca-11e4-4295-6c57-08dc370f826c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF0000343D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM8PR12MB5429 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This adds support for the BT.709/BT.2020 transfer functions on all current 1D curve plane colorops, i.e., on DEGAM, SHAPER, and BLND blocks. With this change the following IGT subtests pass: kms_colorop --run plane-XR30-XR30-bt2020_inv_oetf kms_colorop --run plane-XR30-XR30-bt2020_oetf Signed-off-by: Harry Wentland --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 11 ++++++++--- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 10 +++++++--- 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 20b7eb47388c..d5d356cf9fc6 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -677,6 +677,9 @@ amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_type tf) case DRM_COLOROP_1D_CURVE_SRGB_EOTF: case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF: return TRANSFER_FUNCTION_SRGB; + case DRM_COLOROP_1D_CURVE_BT2020_INV_OETF: + case DRM_COLOROP_1D_CURVE_BT2020_OETF: + return TRANSFER_FUNCTION_BT709; case DRM_COLOROP_1D_CURVE_PQ_125_EOTF: case DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF: return TRANSFER_FUNCTION_PQ; @@ -1287,8 +1290,10 @@ __set_colorop_1d_curve_blend_tf_lut(struct dc_plane_state *dc_plane_state, const struct drm_color_lut *blend_lut; uint32_t blend_size; - if (colorop->type != DRM_COLOROP_1D_CURVE && - colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_EOTF) + if (colorop->type != DRM_COLOROP_1D_CURVE) + return -EINVAL; + + if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) return -EINVAL; if (colorop_state->bypass) { @@ -1324,7 +1329,7 @@ __set_dm_plane_colorop_blend(struct drm_plane_state *plane_state, /* 3nd op: 1d curve - blend */ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { if (new_colorop_state->colorop == old_colorop && - new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_EOTF) { + (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) { colorop_state = new_colorop_state; break; } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index f99d8e09d89b..bc66bd4f9fdd 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -33,14 +33,18 @@ const u64 amdgpu_dm_supported_degam_tfs = BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) | - BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF); + BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) | + BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF); const u64 amdgpu_dm_supported_shaper_tfs = BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) | - BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF); + BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF) | + BIT(DRM_COLOROP_1D_CURVE_BT2020_OETF); const u64 amdgpu_dm_supported_blnd_tfs = - BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF); + BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) | + BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) | + BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF); int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list) {