| Message ID | 20240321-dp-live-fmt-v3-1-d5090d796b7e@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Setting live video input format for ZynqMP DPSUB | expand |
On 21/03/2024 22:43, Anatoliy Klymenko wrote: > Set layer mode of operation (live or dma-based) during layer creation. > > Each DPSUB layer mode of operation is defined by corresponding DT node port > connection, so it is possible to assign it during layer object creation. > Previously it was set in layer enable functions, although it is too late > as setting layer format depends on layer mode, and should be done before > given layer enabled. > > Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > drivers/gpu/drm/xlnx/zynqmp_disp.c | 20 ++++++++++++++++---- > drivers/gpu/drm/xlnx/zynqmp_disp.h | 13 +------------ > drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- > drivers/gpu/drm/xlnx/zynqmp_kms.c | 2 +- > 4 files changed, 19 insertions(+), 18 deletions(-) Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Tomi > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c b/drivers/gpu/drm/xlnx/zynqmp_disp.c > index 8a39b3accce5..e6d26ef60e89 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c > @@ -64,6 +64,16 @@ > > #define ZYNQMP_DISP_MAX_NUM_SUB_PLANES 3 > > +/** > + * enum zynqmp_dpsub_layer_mode - Layer mode > + * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode > + * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode > + */ > +enum zynqmp_dpsub_layer_mode { > + ZYNQMP_DPSUB_LAYER_NONLIVE, > + ZYNQMP_DPSUB_LAYER_LIVE, > +}; > + > /** > * struct zynqmp_disp_format - Display subsystem format information > * @drm_fmt: DRM format (4CC) > @@ -902,15 +912,12 @@ u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer, > /** > * zynqmp_disp_layer_enable - Enable a layer > * @layer: The layer > - * @mode: Operating mode of layer > * > * Enable the @layer in the audio/video buffer manager and the blender. DMA > * channels are started separately by zynqmp_disp_layer_update(). > */ > -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, > - enum zynqmp_dpsub_layer_mode mode) > +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer) > { > - layer->mode = mode; > zynqmp_disp_avbuf_enable_video(layer->disp, layer); > zynqmp_disp_blend_layer_enable(layer->disp, layer); > } > @@ -1134,6 +1141,11 @@ static int zynqmp_disp_create_layers(struct zynqmp_disp *disp) > layer->id = i; > layer->disp = disp; > layer->info = &layer_info[i]; > + /* For now assume dpsub works in either live or non-live mode for both layers. > + * Hybrid mode is not supported yet. > + */ > + layer->mode = disp->dpsub->dma_enabled ? ZYNQMP_DPSUB_LAYER_NONLIVE > + : ZYNQMP_DPSUB_LAYER_LIVE; > > ret = zynqmp_disp_layer_request_dma(disp, layer); > if (ret) > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.h b/drivers/gpu/drm/xlnx/zynqmp_disp.h > index 123cffac08be..9b8b202224d9 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.h > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.h > @@ -42,16 +42,6 @@ enum zynqmp_dpsub_layer_id { > ZYNQMP_DPSUB_LAYER_GFX, > }; > > -/** > - * enum zynqmp_dpsub_layer_mode - Layer mode > - * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode > - * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode > - */ > -enum zynqmp_dpsub_layer_mode { > - ZYNQMP_DPSUB_LAYER_NONLIVE, > - ZYNQMP_DPSUB_LAYER_LIVE, > -}; > - > void zynqmp_disp_enable(struct zynqmp_disp *disp); > void zynqmp_disp_disable(struct zynqmp_disp *disp); > int zynqmp_disp_setup_clock(struct zynqmp_disp *disp, > @@ -62,8 +52,7 @@ void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp *disp, > > u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer, > unsigned int *num_formats); > -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, > - enum zynqmp_dpsub_layer_mode mode); > +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer); > void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer); > void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer, > const struct drm_format_info *info); > diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c > index 1846c4971fd8..04b6bcac3b07 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c > @@ -1295,7 +1295,7 @@ static void zynqmp_dp_disp_enable(struct zynqmp_dp *dp, > /* TODO: Make the format configurable. */ > info = drm_format_info(DRM_FORMAT_YUV422); > zynqmp_disp_layer_set_format(layer, info); > - zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_LIVE); > + zynqmp_disp_layer_enable(layer); > > if (layer_id == ZYNQMP_DPSUB_LAYER_GFX) > zynqmp_disp_blend_set_global_alpha(dp->dpsub->disp, true, 255); > diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c b/drivers/gpu/drm/xlnx/zynqmp_kms.c > index db3bb4afbfc4..43bf416b33d5 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c > @@ -122,7 +122,7 @@ static void zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane, > > /* Enable or re-enable the plane if the format has changed. */ > if (format_changed) > - zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_NONLIVE); > + zynqmp_disp_layer_enable(layer); > } > > static const struct drm_plane_helper_funcs zynqmp_dpsub_plane_helper_funcs = { >
On 21/03/2024 22:43, Anatoliy Klymenko wrote: > Set layer mode of operation (live or dma-based) during layer creation. > > Each DPSUB layer mode of operation is defined by corresponding DT node port > connection, so it is possible to assign it during layer object creation. > Previously it was set in layer enable functions, although it is too late > as setting layer format depends on layer mode, and should be done before > given layer enabled. > > Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > drivers/gpu/drm/xlnx/zynqmp_disp.c | 20 ++++++++++++++++---- > drivers/gpu/drm/xlnx/zynqmp_disp.h | 13 +------------ > drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- > drivers/gpu/drm/xlnx/zynqmp_kms.c | 2 +- > 4 files changed, 19 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c b/drivers/gpu/drm/xlnx/zynqmp_disp.c > index 8a39b3accce5..e6d26ef60e89 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c > @@ -64,6 +64,16 @@ > > #define ZYNQMP_DISP_MAX_NUM_SUB_PLANES 3 > > +/** > + * enum zynqmp_dpsub_layer_mode - Layer mode > + * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode > + * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode > + */ > +enum zynqmp_dpsub_layer_mode { > + ZYNQMP_DPSUB_LAYER_NONLIVE, > + ZYNQMP_DPSUB_LAYER_LIVE, > +}; > + > /** > * struct zynqmp_disp_format - Display subsystem format information > * @drm_fmt: DRM format (4CC) > @@ -902,15 +912,12 @@ u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer, > /** > * zynqmp_disp_layer_enable - Enable a layer > * @layer: The layer > - * @mode: Operating mode of layer > * > * Enable the @layer in the audio/video buffer manager and the blender. DMA > * channels are started separately by zynqmp_disp_layer_update(). > */ > -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, > - enum zynqmp_dpsub_layer_mode mode) > +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer) > { > - layer->mode = mode; > zynqmp_disp_avbuf_enable_video(layer->disp, layer); > zynqmp_disp_blend_layer_enable(layer->disp, layer); > } > @@ -1134,6 +1141,11 @@ static int zynqmp_disp_create_layers(struct zynqmp_disp *disp) > layer->id = i; > layer->disp = disp; > layer->info = &layer_info[i]; > + /* For now assume dpsub works in either live or non-live mode for both layers. > + * Hybrid mode is not supported yet. > + */ This comment style is not according to the style guide, and in fact you fix it in the patch 4. So please fix it here instead. Tomi > + layer->mode = disp->dpsub->dma_enabled ? ZYNQMP_DPSUB_LAYER_NONLIVE > + : ZYNQMP_DPSUB_LAYER_LIVE; > > ret = zynqmp_disp_layer_request_dma(disp, layer); > if (ret) > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.h b/drivers/gpu/drm/xlnx/zynqmp_disp.h > index 123cffac08be..9b8b202224d9 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.h > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.h > @@ -42,16 +42,6 @@ enum zynqmp_dpsub_layer_id { > ZYNQMP_DPSUB_LAYER_GFX, > }; > > -/** > - * enum zynqmp_dpsub_layer_mode - Layer mode > - * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode > - * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode > - */ > -enum zynqmp_dpsub_layer_mode { > - ZYNQMP_DPSUB_LAYER_NONLIVE, > - ZYNQMP_DPSUB_LAYER_LIVE, > -}; > - > void zynqmp_disp_enable(struct zynqmp_disp *disp); > void zynqmp_disp_disable(struct zynqmp_disp *disp); > int zynqmp_disp_setup_clock(struct zynqmp_disp *disp, > @@ -62,8 +52,7 @@ void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp *disp, > > u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer, > unsigned int *num_formats); > -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, > - enum zynqmp_dpsub_layer_mode mode); > +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer); > void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer); > void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer, > const struct drm_format_info *info); > diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c > index 1846c4971fd8..04b6bcac3b07 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c > @@ -1295,7 +1295,7 @@ static void zynqmp_dp_disp_enable(struct zynqmp_dp *dp, > /* TODO: Make the format configurable. */ > info = drm_format_info(DRM_FORMAT_YUV422); > zynqmp_disp_layer_set_format(layer, info); > - zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_LIVE); > + zynqmp_disp_layer_enable(layer); > > if (layer_id == ZYNQMP_DPSUB_LAYER_GFX) > zynqmp_disp_blend_set_global_alpha(dp->dpsub->disp, true, 255); > diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c b/drivers/gpu/drm/xlnx/zynqmp_kms.c > index db3bb4afbfc4..43bf416b33d5 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c > @@ -122,7 +122,7 @@ static void zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane, > > /* Enable or re-enable the plane if the format has changed. */ > if (format_changed) > - zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_NONLIVE); > + zynqmp_disp_layer_enable(layer); > } > > static const struct drm_plane_helper_funcs zynqmp_dpsub_plane_helper_funcs = { >
> -----Original Message----- > From: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> > Sent: Friday, April 5, 2024 5:31 AM > To: Klymenko, Anatoliy <Anatoliy.Klymenko@amd.com> > Cc: dri-devel@lists.freedesktop.org; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; devicetree@vger.kernel.org; linux- > media@vger.kernel.org; Laurent Pinchart > <laurent.pinchart@ideasonboard.com>; Maarten Lankhorst > <maarten.lankhorst@linux.intel.com>; Maxime Ripard > <mripard@kernel.org>; Thomas Zimmermann <tzimmermann@suse.de>; > David Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; > Simek, Michal <michal.simek@amd.com>; Andrzej Hajda > <andrzej.hajda@intel.com>; Neil Armstrong > <neil.armstrong@linaro.org>; Robert Foss <rfoss@kernel.org>; Jonas > Karlman <jonas@kwiboo.se>; Jernej Skrabec > <jernej.skrabec@gmail.com>; Rob Herring <robh+dt@kernel.org>; > Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley > <conor+dt@kernel.org>; Mauro Carvalho Chehab > <mchehab@kernel.org> > Subject: Re: [PATCH v3 1/9] drm: xlnx: zynqmp_dpsub: Set layer mode > during creation > > Caution: This message originated from an External Source. Use proper > caution when opening attachments, clicking links, or responding. > > > On 21/03/2024 22:43, Anatoliy Klymenko wrote: > > Set layer mode of operation (live or dma-based) during layer creation. > > > > Each DPSUB layer mode of operation is defined by corresponding DT > node port > > connection, so it is possible to assign it during layer object creation. > > Previously it was set in layer enable functions, although it is too late > > as setting layer format depends on layer mode, and should be done > before > > given layer enabled. > > > > Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com> > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > --- > > drivers/gpu/drm/xlnx/zynqmp_disp.c | 20 ++++++++++++++++---- > > drivers/gpu/drm/xlnx/zynqmp_disp.h | 13 +------------ > > drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- > > drivers/gpu/drm/xlnx/zynqmp_kms.c | 2 +- > > 4 files changed, 19 insertions(+), 18 deletions(-) > > > > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c > b/drivers/gpu/drm/xlnx/zynqmp_disp.c > > index 8a39b3accce5..e6d26ef60e89 100644 > > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c > > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c > > @@ -64,6 +64,16 @@ > > > > #define ZYNQMP_DISP_MAX_NUM_SUB_PLANES 3 > > > > +/** > > + * enum zynqmp_dpsub_layer_mode - Layer mode > > + * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode > > + * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode > > + */ > > +enum zynqmp_dpsub_layer_mode { > > + ZYNQMP_DPSUB_LAYER_NONLIVE, > > + ZYNQMP_DPSUB_LAYER_LIVE, > > +}; > > + > > /** > > * struct zynqmp_disp_format - Display subsystem format information > > * @drm_fmt: DRM format (4CC) > > @@ -902,15 +912,12 @@ u32 > *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer, > > /** > > * zynqmp_disp_layer_enable - Enable a layer > > * @layer: The layer > > - * @mode: Operating mode of layer > > * > > * Enable the @layer in the audio/video buffer manager and the > blender. DMA > > * channels are started separately by zynqmp_disp_layer_update(). > > */ > > -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, > > - enum zynqmp_dpsub_layer_mode mode) > > +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer) > > { > > - layer->mode = mode; > > zynqmp_disp_avbuf_enable_video(layer->disp, layer); > > zynqmp_disp_blend_layer_enable(layer->disp, layer); > > } > > @@ -1134,6 +1141,11 @@ static int zynqmp_disp_create_layers(struct > zynqmp_disp *disp) > > layer->id = i; > > layer->disp = disp; > > layer->info = &layer_info[i]; > > + /* For now assume dpsub works in either live or non-live > mode for both layers. > > + * Hybrid mode is not supported yet. > > + */ > > This comment style is not according to the style guide, and in fact you > fix it in the patch 4. So please fix it here instead. > Thanks for catching it. > Tomi > > > + layer->mode = disp->dpsub->dma_enabled ? > ZYNQMP_DPSUB_LAYER_NONLIVE > > + : ZYNQMP_DPSUB_LAYER_LIVE; > > > > ret = zynqmp_disp_layer_request_dma(disp, layer); > > if (ret) > > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.h > b/drivers/gpu/drm/xlnx/zynqmp_disp.h > > index 123cffac08be..9b8b202224d9 100644 > > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.h > > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.h > > @@ -42,16 +42,6 @@ enum zynqmp_dpsub_layer_id { > > ZYNQMP_DPSUB_LAYER_GFX, > > }; > > > > -/** > > - * enum zynqmp_dpsub_layer_mode - Layer mode > > - * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode > > - * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode > > - */ > > -enum zynqmp_dpsub_layer_mode { > > - ZYNQMP_DPSUB_LAYER_NONLIVE, > > - ZYNQMP_DPSUB_LAYER_LIVE, > > -}; > > - > > void zynqmp_disp_enable(struct zynqmp_disp *disp); > > void zynqmp_disp_disable(struct zynqmp_disp *disp); > > int zynqmp_disp_setup_clock(struct zynqmp_disp *disp, > > @@ -62,8 +52,7 @@ void zynqmp_disp_blend_set_global_alpha(struct > zynqmp_disp *disp, > > > > u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer > *layer, > > unsigned int *num_formats); > > -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, > > - enum zynqmp_dpsub_layer_mode mode); > > +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer); > > void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer); > > void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer, > > const struct drm_format_info *info); > > diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c > b/drivers/gpu/drm/xlnx/zynqmp_dp.c > > index 1846c4971fd8..04b6bcac3b07 100644 > > --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c > > +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c > > @@ -1295,7 +1295,7 @@ static void zynqmp_dp_disp_enable(struct > zynqmp_dp *dp, > > /* TODO: Make the format configurable. */ > > info = drm_format_info(DRM_FORMAT_YUV422); > > zynqmp_disp_layer_set_format(layer, info); > > - zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_LIVE); > > + zynqmp_disp_layer_enable(layer); > > > > if (layer_id == ZYNQMP_DPSUB_LAYER_GFX) > > zynqmp_disp_blend_set_global_alpha(dp->dpsub->disp, true, > 255); > > diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c > b/drivers/gpu/drm/xlnx/zynqmp_kms.c > > index db3bb4afbfc4..43bf416b33d5 100644 > > --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c > > +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c > > @@ -122,7 +122,7 @@ static void > zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane, > > > > /* Enable or re-enable the plane if the format has changed. */ > > if (format_changed) > > - zynqmp_disp_layer_enable(layer, > ZYNQMP_DPSUB_LAYER_NONLIVE); > > + zynqmp_disp_layer_enable(layer); > > } > > > > static const struct drm_plane_helper_funcs > zynqmp_dpsub_plane_helper_funcs = { > >
diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c b/drivers/gpu/drm/xlnx/zynqmp_disp.c index 8a39b3accce5..e6d26ef60e89 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c @@ -64,6 +64,16 @@ #define ZYNQMP_DISP_MAX_NUM_SUB_PLANES 3 +/** + * enum zynqmp_dpsub_layer_mode - Layer mode + * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode + * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode + */ +enum zynqmp_dpsub_layer_mode { + ZYNQMP_DPSUB_LAYER_NONLIVE, + ZYNQMP_DPSUB_LAYER_LIVE, +}; + /** * struct zynqmp_disp_format - Display subsystem format information * @drm_fmt: DRM format (4CC) @@ -902,15 +912,12 @@ u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer, /** * zynqmp_disp_layer_enable - Enable a layer * @layer: The layer - * @mode: Operating mode of layer * * Enable the @layer in the audio/video buffer manager and the blender. DMA * channels are started separately by zynqmp_disp_layer_update(). */ -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, - enum zynqmp_dpsub_layer_mode mode) +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer) { - layer->mode = mode; zynqmp_disp_avbuf_enable_video(layer->disp, layer); zynqmp_disp_blend_layer_enable(layer->disp, layer); } @@ -1134,6 +1141,11 @@ static int zynqmp_disp_create_layers(struct zynqmp_disp *disp) layer->id = i; layer->disp = disp; layer->info = &layer_info[i]; + /* For now assume dpsub works in either live or non-live mode for both layers. + * Hybrid mode is not supported yet. + */ + layer->mode = disp->dpsub->dma_enabled ? ZYNQMP_DPSUB_LAYER_NONLIVE + : ZYNQMP_DPSUB_LAYER_LIVE; ret = zynqmp_disp_layer_request_dma(disp, layer); if (ret) diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.h b/drivers/gpu/drm/xlnx/zynqmp_disp.h index 123cffac08be..9b8b202224d9 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_disp.h +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.h @@ -42,16 +42,6 @@ enum zynqmp_dpsub_layer_id { ZYNQMP_DPSUB_LAYER_GFX, }; -/** - * enum zynqmp_dpsub_layer_mode - Layer mode - * @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode - * @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode - */ -enum zynqmp_dpsub_layer_mode { - ZYNQMP_DPSUB_LAYER_NONLIVE, - ZYNQMP_DPSUB_LAYER_LIVE, -}; - void zynqmp_disp_enable(struct zynqmp_disp *disp); void zynqmp_disp_disable(struct zynqmp_disp *disp); int zynqmp_disp_setup_clock(struct zynqmp_disp *disp, @@ -62,8 +52,7 @@ void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp *disp, u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer, unsigned int *num_formats); -void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer, - enum zynqmp_dpsub_layer_mode mode); +void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer); void zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer); void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer, const struct drm_format_info *info); diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 1846c4971fd8..04b6bcac3b07 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -1295,7 +1295,7 @@ static void zynqmp_dp_disp_enable(struct zynqmp_dp *dp, /* TODO: Make the format configurable. */ info = drm_format_info(DRM_FORMAT_YUV422); zynqmp_disp_layer_set_format(layer, info); - zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_LIVE); + zynqmp_disp_layer_enable(layer); if (layer_id == ZYNQMP_DPSUB_LAYER_GFX) zynqmp_disp_blend_set_global_alpha(dp->dpsub->disp, true, 255); diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c b/drivers/gpu/drm/xlnx/zynqmp_kms.c index db3bb4afbfc4..43bf416b33d5 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c @@ -122,7 +122,7 @@ static void zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane, /* Enable or re-enable the plane if the format has changed. */ if (format_changed) - zynqmp_disp_layer_enable(layer, ZYNQMP_DPSUB_LAYER_NONLIVE); + zynqmp_disp_layer_enable(layer); } static const struct drm_plane_helper_funcs zynqmp_dpsub_plane_helper_funcs = {