Message ID | 20240325134959.11807-4-macroalpha82@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add Support for RK3326 GameForce Chi | expand |
On 3/25/2024 6:49 AM, Chris Morgan wrote: > From: Chris Morgan <macromorgan@hotmail.com> > > The GameForce Chi is a handheld device with a 3.5" 640x480 ST7703 based > display panel. > Hi Chris, Acked-by: Jessica Zhang <quic_jesszhan@quicinc.com> Thanks, Jessica Zhang > Signed-off-by: Chris Morgan <macromorgan@hotmail.com> > --- > drivers/gpu/drm/panel/panel-sitronix-st7703.c | 87 +++++++++++++++++++ > 1 file changed, 87 insertions(+) > > diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c > index a3e142f156d5..7d8302cca091 100644 > --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c > +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c > @@ -612,6 +612,92 @@ static const struct st7703_panel_desc rgb10max3_panel_desc = { > .init_sequence = rgb10max3_panel_init_sequence, > }; > > +static int gameforcechi_init_sequence(struct st7703 *ctx) > +{ > + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); > + > + /* > + * Init sequence was supplied by the panel vendor. Panel will not > + * respond to commands until it is brought out of sleep mode first. > + */ > + > + mipi_dsi_dcs_exit_sleep_mode(dsi); > + msleep(250); > + > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xf1, 0x12, 0x83); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, 0x31, 0x81, 0x05, 0xf9, > + 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0x00, 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, > + 0x00, 0x02, 0x4f, 0xd1, 0x00, 0x00, 0x37); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x25); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, 0x0c, 0x10, 0x0a, > + 0x50, 0x03, 0xff, 0x00, 0x00, 0x00, 0x00); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, 0x73, 0x73, 0x50, 0x50, > + 0x00, 0x00, 0x08, 0x70, 0x00); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x46); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0b); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, 0x00, 0x13, 0xf0); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, 0x07, 0x07, 0x0b, 0x0b, > + 0x03, 0x0b, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, > + 0xc0, 0x10); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, 0x53, 0x00, 0x1e, > + 0x1e, 0x77, 0xe1, 0xcc, 0xdd, 0x67, 0x77, 0x33, > + 0x33); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x10, 0x10); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x6c, 0x7c); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, 0x08, 0x00, 0x0e, 0x00, > + 0x00, 0xb0, 0xb1, 0x11, 0x31, 0x23, 0x28, 0x10, > + 0xb0, 0xb1, 0x27, 0x08, 0x00, 0x04, 0x02, 0x00, > + 0x00, 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, 0x00, > + 0x88, 0x88, 0xba, 0x60, 0x24, 0x08, 0x88, 0x88, > + 0x88, 0x88, 0x88, 0x88, 0x88, 0xba, 0x71, 0x35, > + 0x18, 0x88, 0x88, 0x88, 0x88, 0x88, 0x00, 0x00, > + 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0x00, 0x00); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, 0x97, 0x0a, 0x82, 0x02, > + 0x13, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x80, 0x88, 0xba, 0x17, 0x53, 0x88, 0x88, 0x88, > + 0x88, 0x88, 0x88, 0x81, 0x88, 0xba, 0x06, 0x42, > + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x23, 0x10, > + 0x00, 0x02, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > + 0x00); > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, 0x00, 0x07, 0x0b, > + 0x27, 0x2d, 0x3f, 0x3b, 0x37, 0x05, 0x0a, 0x0b, > + 0x0f, 0x11, 0x0f, 0x12, 0x12, 0x18, 0x00, 0x07, > + 0x0b, 0x27, 0x2d, 0x3f, 0x3b, 0x37, 0x05, 0xa0, > + 0x0b, 0x0f, 0x11, 0x0f, 0x12, 0x12, 0x18); > + > + return 0; > +} > + > +static const struct drm_display_mode gameforcechi_mode = { > + .hdisplay = 640, > + .hsync_start = 640 + 40, > + .hsync_end = 640 + 40 + 2, > + .htotal = 640 + 40 + 2 + 80, > + .vdisplay = 480, > + .vsync_start = 480 + 17, > + .vsync_end = 480 + 17 + 5, > + .vtotal = 480 + 17 + 5 + 13, > + .clock = 23546, > + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > + .width_mm = 71, > + .height_mm = 53, > +}; > + > +static const struct st7703_panel_desc gameforcechi_desc = { > + .mode = &gameforcechi_mode, > + .lanes = 2, > + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | > + MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_LPM, > + .format = MIPI_DSI_FMT_RGB888, > + .init_sequence = gameforcechi_init_sequence, > +}; > + > static int st7703_enable(struct drm_panel *panel) > { > struct st7703 *ctx = panel_to_st7703(panel); > @@ -887,6 +973,7 @@ static void st7703_remove(struct mipi_dsi_device *dsi) > > static const struct of_device_id st7703_of_match[] = { > { .compatible = "anbernic,rg353v-panel-v2", .data = &rg353v2_desc }, > + { .compatible = "gameforce,chi-panel", .data = &gameforcechi_desc }, > { .compatible = "powkiddy,rgb10max3-panel", .data = &rgb10max3_panel_desc }, > { .compatible = "powkiddy,rgb30-panel", .data = &rgb30panel_desc }, > { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc }, > -- > 2.34.1 >
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c index a3e142f156d5..7d8302cca091 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c @@ -612,6 +612,92 @@ static const struct st7703_panel_desc rgb10max3_panel_desc = { .init_sequence = rgb10max3_panel_init_sequence, }; +static int gameforcechi_init_sequence(struct st7703 *ctx) +{ + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + + /* + * Init sequence was supplied by the panel vendor. Panel will not + * respond to commands until it is brought out of sleep mode first. + */ + + mipi_dsi_dcs_exit_sleep_mode(dsi); + msleep(250); + + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xf1, 0x12, 0x83); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, 0x31, 0x81, 0x05, 0xf9, + 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, + 0x00, 0x02, 0x4f, 0xd1, 0x00, 0x00, 0x37); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x25); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, 0x0c, 0x10, 0x0a, + 0x50, 0x03, 0xff, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, 0x73, 0x73, 0x50, 0x50, + 0x00, 0x00, 0x08, 0x70, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x46); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0b); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, 0x00, 0x13, 0xf0); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, 0x07, 0x07, 0x0b, 0x0b, + 0x03, 0x0b, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, + 0xc0, 0x10); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, 0x53, 0x00, 0x1e, + 0x1e, 0x77, 0xe1, 0xcc, 0xdd, 0x67, 0x77, 0x33, + 0x33); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x10, 0x10); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x6c, 0x7c); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, 0x08, 0x00, 0x0e, 0x00, + 0x00, 0xb0, 0xb1, 0x11, 0x31, 0x23, 0x28, 0x10, + 0xb0, 0xb1, 0x27, 0x08, 0x00, 0x04, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, 0x00, + 0x88, 0x88, 0xba, 0x60, 0x24, 0x08, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0xba, 0x71, 0x35, + 0x18, 0x88, 0x88, 0x88, 0x88, 0x88, 0x00, 0x00, + 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, 0x97, 0x0a, 0x82, 0x02, + 0x13, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x80, 0x88, 0xba, 0x17, 0x53, 0x88, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x81, 0x88, 0xba, 0x06, 0x42, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x23, 0x10, + 0x00, 0x02, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, 0x00, 0x07, 0x0b, + 0x27, 0x2d, 0x3f, 0x3b, 0x37, 0x05, 0x0a, 0x0b, + 0x0f, 0x11, 0x0f, 0x12, 0x12, 0x18, 0x00, 0x07, + 0x0b, 0x27, 0x2d, 0x3f, 0x3b, 0x37, 0x05, 0xa0, + 0x0b, 0x0f, 0x11, 0x0f, 0x12, 0x12, 0x18); + + return 0; +} + +static const struct drm_display_mode gameforcechi_mode = { + .hdisplay = 640, + .hsync_start = 640 + 40, + .hsync_end = 640 + 40 + 2, + .htotal = 640 + 40 + 2 + 80, + .vdisplay = 480, + .vsync_start = 480 + 17, + .vsync_end = 480 + 17 + 5, + .vtotal = 480 + 17 + 5 + 13, + .clock = 23546, + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, + .width_mm = 71, + .height_mm = 53, +}; + +static const struct st7703_panel_desc gameforcechi_desc = { + .mode = &gameforcechi_mode, + .lanes = 2, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_LPM, + .format = MIPI_DSI_FMT_RGB888, + .init_sequence = gameforcechi_init_sequence, +}; + static int st7703_enable(struct drm_panel *panel) { struct st7703 *ctx = panel_to_st7703(panel); @@ -887,6 +973,7 @@ static void st7703_remove(struct mipi_dsi_device *dsi) static const struct of_device_id st7703_of_match[] = { { .compatible = "anbernic,rg353v-panel-v2", .data = &rg353v2_desc }, + { .compatible = "gameforce,chi-panel", .data = &gameforcechi_desc }, { .compatible = "powkiddy,rgb10max3-panel", .data = &rgb10max3_panel_desc }, { .compatible = "powkiddy,rgb30-panel", .data = &rgb30panel_desc }, { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc },